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Configuring Xilinx FPGAs using an XC9500 CPLD and parallel PROM

Posted: 12 Apr 2001 ?? ?Print Version ?Bookmark and Share

Keywords:xilinx? xc9500? cpld? fpga? programmable gate array?

This application note describes a simple, low-cost design to configure any Xilinx FPGA in a serial configuration mode using a Xilinx XC9500 CPLD and any parallel PROM.

View the PDF document for more information.



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