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Dolphin, Raisonance team-up on microcontroller core

Posted: 01 Jun 2001 ?? ?Print Version ?Bookmark and Share

Keywords:8051 microcontroller? fpga? soc? fpga?

Dolphin Integration SA and Raisonance SA have teamed up to create a so-called "hierarchical" development system for the 8051 8-bit microcontroller core, which is available for license from Dolphin.

In support of the Flip8051 core, the two companies linked their proprietary simulators?Dolphin's Smash HDL and mixed-signal simulator and the Sim-Ice instruction-set simulator from Raisonance. The hierarchical system provides tools for HDL simulation, for instruction-set simulation and for breadboard support that are designed to work with an emulator based on an FPGA implementation of the core, rather than the usual bonded-out chip.

"The move to [SoC] has a consequence for emulators. If you have to introduce a new emulator every time there is a little change in the core, you are doomed," said Michel Depeyrot, chief executive officer of Dolphin. "We treat the target as an SoC, not as a microcontroller, so now it is hierarchical, with one FPGA emulating the core, one providing the tracing function and the peripherals emulated on a breadboard."

The Flip8051 was developed by Richard Watts Associates Ltd. but was acquired by Dolphin in August 1999. Using FPGAs and FPGA arrays in emulators is not uncommon, though it usually involves a reduction in emulation speed.

Debug link

"We believe we can get to the largest part of the market with this. The interaction between CPU and peripherals is not that high," said Depeyrot.

Dolphin and Raisonance have patented a form of lockable debug interface intended to prevent piracy of ROM code or design data through the emulation port that is usually present even in packaged systems.

The patented system lets the program developer authorize memory read or write operations on either data memory or program memory embedded with any microprocessor in a system-level chip, Dolphin claimed. The protection mechanism is generally applicable to any processor core and any serial or parallel-debug interface, whether wired or wireless.

"The threat comes from the capability to link an emulator by RF; to perform downloading and uploading from and to information appliances. The patent works by having an access code. It is a software-controlled hardware for locking the system, so you control who uses the interface," said Depeyrot. "It is a general-purpose interface, but we are applying it to the JTAG debugging interface. Other people can use it, but they will have to license it from us."

Depeyrot said a key factor in the effectiveness of the hierarchical system was that all the elements had been designed to work together and used similar system partitioning.

? Peter Clarke

EE Times





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