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Motorola adopts Cadence's analog/mixed-signal design solution

Posted: 28 Jun 2002 ?? ?Print Version ?Bookmark and Share

Keywords:3D device? Assura RCX? analog design? Assura DRC/LVS?

Motorola Inc.'s Semiconductor Products Sector (SPS) has adopted Cadence Design Systems Inc.'s full-chip 3D device-level parasitic extraction solution called Assura RCX, for its analog and full-custom design flows.

According to Motorola, they selected Assura RCX because of its consistent accuracy for device-level parasitic resistance and capacitance extraction and its good integration to the Cadence Analog Design Environment.

Motorola's internal mixed-signal design kit is designed to support the processes in the Assura physical verification solution for LVS, DRC and RCX. This endorsement of RCX follows an earlier decision by Motorola to transition its installed base of Diva Design Rule Checking/Layout-Versus-Schematic (DRC/LVS) users to Assura DRC/LVS.





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