Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > Controls/MCUs
?
?
Controls/MCUs??

Computer CPU makers debate multithreading, security

Posted: 17 Oct 2003 ?? ?Print Version ?Bookmark and Share

Keywords:computer? microprocessor? microprocessor forum?

Computer microprocessor makers debated the merits of multithreading and hardware security at the Microprocessor Forum. Server CPU makers Fujitsu, IBM and Sun Microsystems provided more details on their upcoming multithreaded architectures, while Via Technologies showed a CPU with hardware security and Transmeta officially announced its Efficeon notebook chip.

While major server CPUs are moving to multicore, multithreaded architectures, an IBM senior engineer said the company has determined dual-threaded cores are optimal for its chips. "If you have a very efficient pipeline and memory access is very good, you get the best performance with two threads per die," said Balaram Sinharoy, Power5 chief scientist.

IBM's Power5 chip, a dual-core processor expected to ship next year, gets an average 40 percent performance boost from being dual-threaded, Sinharoy said. However, adding an extra thread only gains about 10-15 percent more performance, he added.

Sinharoy added that the Power6 design to be made in 65nm technology is "well under way" for a 2006 launch, though he would not comment on the number of cores or threads it will support. Both Sinharoy and Quinn Jacobson, a staff CPU architect for Sun, suggested at the 65nm node it is feasible to fit three CPU cores on a single die.

Jacobson said Sun will implement a variety of numbers of cores and threads on its processors depending on the target market. He discussed the UltraSparc IV processor that uses two single-threaded UltraSparc III cores and will ship early next year based on a 130nm process. A year later, a second-generation part built in 90-nm technology will put L2 cache and L3 cache tags on board to boost thread-level performance.

Similarly, Fujitsu discussed a dual-core Sparc chip dubbed Olympus currently in a prototype stage running at 2GHz made in its 90nm process and aimed at a next-generation Fujistu Primepower server.

Client CPU makers Via and Transmeta said they see no need for multithreading in their markets. "Multithreading is an admission you can't keep the pipeline full, and a better solution is just to keep that pipeline full," said David Ditzel, chief technology officer of notebook and embedded CPU maker Transmeta.

Security scenarios

On the security front, Via announced an X86 processor with two on-board random number generators and full hardware support for the AES security algorithm. The C5P is a Pentium III equivalent chip made in a 130nm process and measuring 47mm?.

The C5P's hardware security could enable encryption for virtual private network software and e-mail traffic as well as all hard disk data, said Glenn Henry, president of Centaur Technology, a CPU design unit of Via. The hardware features require less than 1 percent of the C5P's die, making it "essentially free," Henry said.

Via plans to support the SHA-1 hashing algorithm in its next-generation C5I, a 2-GHz x86 processor expected to tape out in a 90nm process in January. Via may also provide support for DES and triple DES in future products.

"Other people have done hardware security before, but its never been implemented in a general purpose CPU before. Our goal is to find out if anywhere cares about this," quipped Henry. "Security is just like 3D graphics. Hardware does it faster than software, it takes minimal die area and everyone will want it, so why not do it in the CPU," added Henry.

Ditzel said Transmeta is taking a software approach to security with expanded instructions in its Efficeon notebook processor. "Industry standards are a big issue in security so we decided to keep our implementation soft to enable change," Ditzel said.

In the PC world, Microsoft, Intel and others are developing a broad PC security architecture called Next-Generation Secure Computing Base (NGSCB) expected to emerge in 2005. Jacobson said Sun is working with the ad-hoc Trusted Computing Group to define how that technology could be implemented in servers.

Henry said Via is skeptical about the NGSCB approach. "Microsoft is trying to solve the security problem with a capital S. Frankly I don't think their approach is going to work, or if it does it will be significantly delayed," Henry added.

- Rick Merritt

EE Times





Article Comments - Computer CPU makers debate multithre...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top