Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > Processors/DSPs
?
?
Processors/DSPs??

STMicro DSP core running above 600MHz

Posted: 23 Dec 2003 ?? ?Print Version ?Bookmark and Share

Keywords:stmicroelectronics? dsp core? st100? st122?

STMicroelectronics has released an embeddable DSP core that can be implemented in versions that run at above 600MHz or that consume <0.1mW/MMAC in a typical portable telecom application.

Based on the company's ST100 DSP architecture that allows user-customized instruction sets, the ST122 Dual MAC core is supported by an evaluation chip fabricated in 130nm technology and a complete development platform.

Available in the form of synthesizable IP, the ST122-DSP can be mapped into various versions ranging from ultra-low power to high speed operation. It combines VLIW and RISC features to achieve balance between performance and code size. Flexible instruction modes allow a mixture of 16, 32 and 128-bit instructions and instruction sets can be customized to add applications-specific operators.

The dual-MAC ST122 core can fetch four 32-bit instructions using 128-bit instruction mode and execute them in a single clock cycle. The ST122 evaluation device includes 16KB of L1 Program cache, 256KB of L2-Program memory and 2x64KB of data memory accessed at the DSP core's maximum clock speed.

Target applications include mobile terminals, cellular infrastructure equipment, networking, broadband modems, voice-over-IP, data storage and mobile multimedia.





Article Comments - STMicro DSP core running above 600MH...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top