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DesignCon keynoter points to programming skills in the late-silicon age

Posted: 05 Feb 2004 ?? ?Print Version ?Bookmark and Share

Keywords:embedded processor? asic? systemc? rtos?

The electronics industry is entering a new era - one in which embedded processors must function increasingly asynchronously, must adapt spontaneously to data errors and bypass expensive manufacturing processes, a University of California professor told DesignCon 2004.

UC-Berkeley professor Jan Rabaey delivered the keynote address here entitled, "Design in the Late-Silicon Age." Rabaey stressed the need for yet-to-be-invented processing architectures and the programming skills needed to animate them.

Rabaey, director of the Giga-Scale Research Center at UC-Berkeley, said the costs, complexity and power consumption associated with 130- and 90nm ASIC design was rapidly becoming prohibitive. Hence, new thinking processes are required to carry the industry through what he called "the late-silicon age."

The later age will rely on nanotubes for processing as well as organic polymers and molecular electronics. But radical changes in the design and manufacture of system chips are needed first.

Already, in the late-silicon age, ASIC design starts were declining rapidly, according to Rabaey (citing data from Synopsys), thanks to the "triple whammy" embodied in NRE (non-recurring engineering) costs, skyrocketing mask costs, and decreasing productivity. Mask costs are already at $1 million, and projected to go to $2 million for designs with smaller than 100nm geometries, Rabaey said. While productivity always has an inverse relationship to the number of gates on a chip, Rabaey said, the design effort increases exponentially once the number of gates-per-chip extends beyond 10 million.

It's become common place to put two or more microprocessors on one chip, Rabaey said (showing paper presentations from the 2002 International Solid State Circuits Conference, ISSCC). "It's easy to create concurrency," he said. "Managing concurrency is difficult."

Rabaey projected that embedded system programmers - "those experienced with C, SystemC and real-time operating systems (RTOS)" - will outnumber and outrank IC designers in the late-silicon age. Thus, it will be more important to create and program malleable architectures, than to build high-performance architectures with limited functions and programming difficulties.

The keys to success in wireless, automotive, consumer and media processing applications, he said, were reusable processing elements. Structured ASICs - what Rabaey called "return of the gate array" - promises to minimize masks costs by changing only the upper metallization layers to implement a new design. This could represent a disruptive technology for traditional ASIC designs, he said.

- Stephan Ohr

EE Times





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