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MoSys licenses 1T-SRAM-R embedded memory to Open-Silicon

Posted: 09 Jul 2004 ?? ?Print Version ?Bookmark and Share

Keywords:1t-sram-r? embedded memory? open-silicon? asic? logic process?

MoSys Inc. has licensed the 1T-SRAM-R embedded memory technology to Open-Silicon Inc. MoSys' patented technology will enable Open-Silicon to provide its customers with high-quality ASICs containing embedded memory, which will be fabricated in a standard logic process.

The 1T-SRAM-R technology was claimed to dramatically reduce soft error rates (SERs) to fewer than 10 FIT/Mb in 0.13?m process technology resulting in improved system-level reliability at a low cost while still maintaining the simple, industry-standard SRAM interface.

"MoSys' 1T-SRAM-R memory, including it's patented Transparent Error Correction (TEC) technology, provides a valuable solution for embedding large high-performance, low-power memories cost-effectively into SoC designs," said Rajesh Shah, director of engineering and IP at Open-Silicon. "1T-SRAM-R memory technology in collaboration with our OpenMODEL concept addresses our customer's growing need to make intelligent and informed choices that lower cost and reduce risk at each step of the ASIC implementation," Shah added.





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