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Mentor tool improves Actel-based FPGA design performance

Posted: 06 Sep 2004 ?? ?Print Version ?Bookmark and Share

Keywords:actel? mentor graphics? precision rtl? synthesis tool? prosaic plus?

Actel Corp. and Mentor Graphics Corp. introduced the latest version of Mentor Graphics' Precision RTL Synthesis tool that delivers higher performance on designs utilizing Actel's flash-based, live at power-up ProASIC Plus family of FPGAs.

According to the two companies, customers using the Precision RTL Synthesis tool can expect to achieve an average of 18 percent improvement in clock frequency over previous versions of the software. With the Precision RTL Synthesis tool, which is fully integrated into Actel's Libero 6.0 integrated design environment (IDE), designers can now specify higher frequencies and realize even greater performance gains from their ProASIC Plus devices within their existing design flows.

Mentor's synthesis tool

The Precision RTL synthesis tool defines a new approach to complex FPGA design. Built on a unified data model, it allows designers to cross-probe between multiple views, giving users added control when analyzing a design. This debug environment includes an incremental timing analysis tool that allows companies to take control of next-generation FPGA implementation and timing challenges, resulting in shorter design cycles and higher performance. Further, the ProASIC Plus FPGA family consists of devices ranging from 75,000 to 1 million system gates.





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