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Intel bullish on technology direction at analysts' meeting

Posted: 10 Dec 2004 ?? ?Print Version ?Bookmark and Share

Keywords:intel? 90nm? 65nm? cmos?

Sounding anything other than a company that has had its share of missteps in recent months, outgoing Intel chief executive Craig Barrett expressed confidence and even a bit of cockiness at the company's Fall analysts' conference in New York on Tuesday (Dec. 7), predicting Intel's technology strengths would distance the semiconductor giant from its competitors.

Barrett said Intel has the upper hand in producing the most sophisticated chips and none of its competitors is capable of catching up. He claimed power consumption is the clear competitive advantage, showing curves of transistor leakage vs. drive current for the company's 90nm and 65nm products.

"Based on published papers from our competitors we know that our 90nm and 65nm process technologies are clearly ahead of them," Barrett said.

Barrett went so far as to predict that CMOS scaling will continue comfortably for the next 15 years, but it won't be the normal tweaks that will enable each new generation but careful attention paid to achieving the optimum price/performance/watt combination.

"Our dual-core strategy answers that criterion," Barrett said. "The company is on a roll to get dual-core and multi-core chips out the door next year in each of its three chip markets: desktop, servers, and mobile."

He added, "We are forecasting that more than 70 percent of our chips will be dual-cores exiting 2006 for desktops and mobile computers, and 85 percent of chips shipped for servers will be either dual or multi-core chips." Barrett claimed that with single-core implementations performance would only double in four years, but with dual-core chips Intel expects performance will improve by a factor of 10 by 2008.

To maintain its rapid pace of processor development, Intel continues to pour dollars into research and development, to the tune of $4.7 billion this year, compared to $3.1 billion five years ago according to Barrett.

Intel is also pouring more research and development (R&D) money toward manufacturing and communications innovations, as opposed to computing which had almost 50 percent of the R&D pie in 1999. "Today computing R&D has been eased to 36 percent of the overall pie while 25 percent is devoted to communications vis-a-vis 14 percent n 1999, and R&D for manufacturing is up to 27 percent from 20 percent in 1999," Barrett said.

Incoming chief executive and current president and chief operating officer Paul Otellini told analysts, "We are also executing on the platformalization of Intel," explaining that more attention will be paid to offering suites of products for four main markets: mobile, digital home, digital enterprise, and emerging markets.

"In addition to our core microprocessors we will be packaging chip sets, communications and graphics software that will be geared toward one of the four market segments," said Otellini. He said that Intel is the number 1 client Wi-Fi supplier today, and is banking on Wi-Max to be the "last mile" portion in many emerging markets, such as Eastern Europe, China and India.

Likewise, Intel is transforming itself into a chip company that will offer more consumer electronics functionality with its offerings, especially for the digital home market, according to Otellini.

Both Barrett and Otellini admitted that Intel has faltered in the communications area, saying Intel needs to invest more in communications globally. "A lot of the incentives are coming from overseas," said Barrett.

Intel's global presence is touted as a global brand, fifth in a list of the world's most valuable brands at $33.5 billion, after such recognizable brands as Coca-Cola, Microsoft, IBM, and GE. "That has its unintended consequences," quipped Barrett. "Recently when I visited India and was asked about whether we would build a chip fab there, I said we were looking at maybe starting an assembly line. Yet reports had Intel starting chip fabrication in India. That is not the case."

Barrett did specify that runs of chipsets will continue on older 200mm lines but that eventually "fabs need to be converted, upgraded or consolidated" based on size (180,000 to 200,000 sq feet is considered optimum) and location.

- Nicolas Mokhoff

EE Times





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