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Renesas uses CoolTime for voltage drop analysis

Posted: 12 Apr 2005 ?? ?Print Version ?Bookmark and Share

Keywords:CoolTime? dynamic voltage? soc design?

Renesas Technology Corp. has adopted Sequence Design's CoolTime as its standard for dynamic voltage drop analysis on next-generation SoC designs.

According to Sequence Design, CoolTime performs fast transient current analysis to incorporate dynamic effects resulting from RLC parasitics of power-grid, package, decoupling capacitors, and non-switching cells. For designs under 130nm, these dynamic effects can contribute to as much as 30 percent to 50 percent of the total voltage drop.

During the review, Renesas Technology ran the tools through 19 separate test circuits and found CoolTime achieved top accuracy in most of the test cases versus reference circuit simulation results. In addition, Sequence demonstrated a clear ease-of-use advantage with its vectorless analysis.





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