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Altera, PMC-Sierra co-develop multi-serial protocol development system

Posted: 02 Jun 2005 ?? ?Print Version ?Bookmark and Share

Keywords:multi-serial protocol development system? stratix ii ep2s90 fpga? pm8358 quadphy�serializer-deserializer? transceiver? wireless base station?

Altera Corp. and PMC-Sierra have jointly developed a multi-serial protocol development system. The development system incorporates Altera's Stratix II EP2S90 FPGA and PMC-Sierra's PM8358 QuadPHY 10GX serializer-deserializer (SERDES) transceiver for rapid prototyping of high-performance backplane and line interface solutions, including wireless base station backplanes.

The development system supports emerging serial protocols with rates from 1.2 to 3.2Gbps such as PCI Express, Open Base Station Architecture Initiative (OBSAI), and Common Public Radio Interface (CPRI).

"Altera's partnership with PMC-Sierra enables our customers to deploy serial links across networking, storage, computing, and wireless applications," said John Sakamoto, senior director of Altera's wireline business unit. "The high density and programmability of our Stratix II FPGAs provide the flexibility required to meet rapidly changing industry specifications, while offering a migration path to our HardCopy II structured ASICs for high-volume production," added Sakamoto.

The serial protocol development system board has a PCI Express edge connector and a Tyco HM-Zd connector, with eight serial lanes from both connectors interfacing to two QuadPHY 10GX SERDES devices. Two QuadPHY 10GX devices interface to the Altera Stratix II EP2S90. The Stratix II provides an interface to a memory module. The Stratix II also provides an LVDS interface to a HM-Zd connector for applications such as SPI-4.Phase 2. Additional protocols that can be implemented using this development system include Serial RIO, InfiniBand, XAUI, and 10 Gigabit Fibre Channel. The development system may be configured as an end point solution or as a bridge solution for all of these serial protocols.





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