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Altera, InterNiche, MorethanIP announce networking reference design

Posted: 01 Jul 2005 ?? ?Print Version ?Bookmark and Share

Keywords:networking reference design? Nios II? embedded processor?

Altera Corp., InterNiche and MorethanIP have announced a networking reference design for Altera's Nios II embedded processor. Delivering over 60Mb of throughput via TCP/IP over a 100Mb link, embedded designers can leverage the flexibility, performance and ease-of-use of the reference design for embedded applications requiring high-throughput network connectivity.

Embedded designers can use Altera's SOPC Builder tool and Nios II integrated development environment (IDE) to customize their reference design using MorethanIP's MAC-NET core and InterNiche's NicheStack IPv4 software stack. SOPC Builder enables the system engineer to quickly add, edit and specify the connections between the Nios II processor, MAC-NET core and other peripherals in the system. It then connects all of the peripherals together using the high-performance Avalon switch fabric, enabling the MAC-NET core to efficiently move data through local memory resources.

The MAC-NET core supports 10/100/1000Mbit Ethernet connections and incorporates a layer 3/4 high-performance checksum block to accelerate network operations supporting InterNiche's NicheStack IPv4 and IPv6 with TCP and user datagram protocol (UDP) protocols. InterNiche's NicheStack IPv4 provides developers with a configurable TCP/IP protocol suite equipped with a complete range of management and security protocols including simple network management protocol (SNMP), secure sockets layer (SSL), IP security (IPsec) and embedded HTTP server, as well as a seamless roadmap to IPv6 support.





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