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RF/Microwave??

Platform supports spread-spectrum software-defined radio dev't

Posted: 21 Oct 2005 ?? ?Print Version ?Bookmark and Share

Keywords:spectrum signal processing? flexcomm? sdr-3000? smrdp? rf-to-ethernet?

SDR-3000 SMRDP

Spectrum Signal Processing supplies software-defined platforms for a variety of defense electronics applications, including communications, SIGINT (signals intelligence), surveillance, EW (electronic warfare) and satellite communications. The company has been offering application engineering services, and modified COTS (commercial-off-the-shelf) platforms, for quite a while, to the government, allies and prime contractors.

The flexComm SDR-3000 SMRDP "RF-to-Ethernet" wideband prototyping and development transceiver platform keeps with Spectrum's heritage of offering fully integrated COTS products. In addition to the features outlined in the company's press statement, the SDR-3000 SMRDP is an extensible DSP platform in a number of ways.

Although it supports one channel as delivered, additional transceiver channels can be accommodated. What's more, these channels can operate in either full DUX (duplex) or half-DUX, and do that anywhere in the RF spectrum between 500kHz and 3GHz. IF (intermediate frequency) bandwidths can be up to 30MHz wide.

RF blocks
The RF transceiver front-end consists of four elements from Digital Receiver Technologies Inc. (DRTi). The hardware uses DRTi's Model RFT2 tuner, a Model TEX exciter, a Model REF2 oscillator, and a SBC (single-board computer). The complete subsystem is controlled using either front-panel Ethernet or external sync signals. A sockets-based control library running on a PowerPC communicates over the Ethernet interface to the SBC. Frequency and attenuation commands are written and status is queried over this interface.

In addition, frequency tables can be loaded into the TEX exciter and RFT2 tuner, with sync signals supporting low-latency deterministic stepping. Fine tuning is achieved through a combination of coarse tuning of the RF subsystem and fine tuning of up- and down-converter cores on an FPGA-based (field programmable gate array) processor.

Precise digital control
IF-strip data flows through the FPGA processor, thereby permitting precise control of data burst insertion or acquisition. The system also updates the frequency table continuously in real-time. GPS absolute time via IRIG-B and 10MHz references.

These components support operation in either fast or slow spread-spectrum frequency-hopping modes, at speeds to 5000 hops/s. The system uses a GPS (Global Positioning System) satellite absolute time reference for IRIG-B and the 10MHz reference.

Spectrum's so-called SCA (Software Communications Architecture) was also designed to take the risk out of spread-spectrum systems and waveform generation applications. The architecture does that by relying on programmable DDCs (digital down-converters) and DUCs (digital up-converter), based on the FPGA cores.

The SDR-3000 SMRDP integrates the FPGAs and DSPs in a seamless fabric that's, in part, based on the company's XMC-3311 wideband analog I/O mezzanine module. It resides on a PRO-3500 baseband processing engine. These modules are what make the SMRDP so scalable.

Xilinx FPGA processing
The XMC-3311, in a in a single-width VITA 42.0 XMC form-factor, packs dual 12-bit analog-to-digital converters (ADCs) and a single 14-bit DAC (digital-to-analog) converter. These devices run at up to 213Msample/s. The A/Ds and DAC are integrated with a Xilinx Virtex-4 FPGA for signal processing and filtering.

For its part, the PRO-3500 is a cPCI (CompactPCI)-based Motorola PowerPC G4 processing engine. It contains two G4s, and can support up to two more G4s via two ePMC sites. Each of these sites can also support standard PMC modules, or any of Spectrum's range of ePMC-based mezzanine cards. An Intel 405GP embedded controller runs the module's control software and networking hooks.

Software support
In addition to the quicComm and SCA BSP base software layers mentioned in Spectrum's notes, the SMRDP also comes with a Harris dmTK toolkit, and an SCA core framework and development toolset. The architecture also supports programmable FIR (finite impulse response) coefficients on its up-converter and down-converter modules, and you get the optional ability to down-convert multiple channels from the same digital IF.

The system also supports time-sensitive and time-slotted applications. It does that by means of time stamping of ADC input samples, and time triggering digital-to-analog converter output samples.

An RF control API (application programming interface) is also supplied. It manages all functions of the RF subsystem. You also get a data-flow example that extends from the system's RF input, through the entire signal processing chain, and out. Source code for RF control, frequency hopping, the DDC/DUC cores and the time stamping is part of the application.

Software partnering
Finally, Spectrum partners with Zeligsoft Software, offering the latter's CE (Component Enabler). Zeligsoft CE is a visual model-driven tool that lest team members analyze and communicate. Zeligsoft CE also validates the SCA rules at the architectural level and generates correct-by-construction SCA-compliant artifacts. CE removes the need to author descriptor files (XML), SCA code, and documentation manually.

- Alex Mendelsohn
eeProductCenter




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