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Tool ARMs for SoC validation

Posted: 08 Dec 2005 ?? ?Print Version ?Bookmark and Share

Keywords:SoC? FPGA? SOC-VSP? virtual system prototyping tool? Carbon Design Systems?

You can't validate a complete SoC without looking at both hardware and software, which has traditionally meant using emulation or building an FPGA prototype. With its new SOC-VSP virtual system prototyping tool, Carbon Design Systems Inc. claims to offer a better way.

SOC-VSP extends ARM's RealView SoC Designer to import "Carbonized" VHDL or Verilog RTL models. Carbon's compiler produces cycle-accurate models with C-language application programming interfaces, claiming a 50x to 200x speed increase over RTL simulation. SOC-VSP also provides high-level transactors for ARM's Amba bus protocols, including AHB, APB and AXI.

Carbon rolled out a generic VSP product in June, but previous interfaces to software development environments have been done as custom solutions, said Steve Butler, CEO at Carbon. SOC-VSP includes all of the capabilities of the VSP product but adds the ARM RealView interface and ARM transactors in an off-the-shelf package, he said.

"SoC designers usually don't validate their architectures until very late," Butler said. "With SOC-VSP, you can validate an architecture as soon as a few blocks for your differentiating RTL are created." SOC-VSP allows complete system validation six to nine months earlier than would be possible with an emulator, he said.

To the user, Butler noted, SOC-VSP looks like an extended version of the RealView debugger. SOC-VSP provides a common environment that can be used by system architects to profile an SoC with cycle accuracy; by software developers to get a jump on firmware debug; and by hardware designers to leverage a fast, mixed-level simulation with plug-in bus transactors.

Using SOC-VSP's component wizard, users can compile RTL, and a component is automatically added to RealView's simulation library. The RealView user interface makes it possible to drop these components onto a graphical design "canvas" along with processors and peripheral models. Users can connect components to Amba buses by drawing lines and assigning bus attributes.

RealView debugging features such as single-stepping, setting breakpoints and tracing registers, memories and signals work with the Carbonized RTL models. The RealView waveform viewer animates both transactions and signals. A "save and restore" feature lets users jump deeply into a simulation to validate a bug fix, as opposed to rerunning the entire simulation.

"We worked closely with ARM to get the right level of detail and integration" in SOC-VSP, Butler said. While ARM separately sells the RealView SoC Designer, there may be some joint selling between the companies, Butler said.

Carbon continues to sell the generic VSP product. SOC-VSP, said Butler, is a superset that adds the RealView integration and the ARM bus transactors.

SOC-VSP will be available at the end of the year, starting at $45,000 for the first seat. Volume discounts are available.

- Richard Goering
EE Times




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