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Analog signal processor doubles performance, uses less power

Posted: 22 Mar 2006 ?? ?Print Version ?Bookmark and Share

Keywords:AN231E04? dynamically-programmable analog signal processors? Anadigm?

Anadigm announced the availability of the AN231E04, its third-generation of dynamically-programmable analog signal processors. The product operates with a 3.3V power supply, and is said to reduce power consumption by two thirds while doubling performance, compared with its second-generation device. The AN231E04 is designed to target analog signal processing in RFID readers, audio and industrial applications.

The device suits applications that require analog signal conditioning, filtering, gain control, rectification, summing, subtracting and multiplying. Power supply is reduced from 5V to 3.3V, with typical power in the 125mW range. The supposed doubling of performance allows the designer to double analog signal bandwidth, from DC to 999kHz. In specific applications, such as UHF RFID "class 0", the increase performance is said to allow analog signal bandwidth of greater than 2MHz.

Anadigm emphasizes the addition of "offset nulling," which is said to reduce typical CMOS op amp input offset voltages from 4mV to under 250V. This feature is user controlled, so offset nulling can be performed automatically after configuration, or at any future time, allowing for adjustments as a result of environmental changes, such as temperature.

The AN231E04 consists of a 2 x 2 matrix of configurable analog blocks, surrounded by programmable interconnect resources and analog I/O cells with active elements. The on-chip clock generator block controls multiple non-overlapping clock domains generated from an external stable clock source, providing the designer optimization and fine tuning of configurable analog module (CAM) parameters for a given signal frequency. Two of the internal clocks have user defined phase control, which aims to improve performance of synchronous demodulation circuits.

Configuration data is stored in an on-chip SRAM configuration memory. Additionally, an SPI-like interface is provided for serial load of configuration data from a microprocessor or DSP. This memory is "shadowed," allowing a different circuit configuration to be loaded as a background task. The product can be programmed using the AnadigmDesigner2 EDA software, which aims to assist designers in constructing complex functions using CAMs as building blocks.

The AN231E04 is packaged in a 44-pin QFN package measuring 7-by-7-by-0.9mm, and is RoHS compliant. Samples and production devices are available now. The suggested price is $8.46 at 1,000-piece quantities. The AN231K04-DVLP3 development system is also available for a suggested price of $199, which includes a development board, a copy of the AnadigmDesigner2 EDA software and documentation.




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