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Wet lithography makes its way out to fabs

Posted: 16 Jun 2006 ?? ?Print Version ?Bookmark and Share

Keywords:David Lammers? lithography? fabs?

Strained silicon answered the call first, offering mobility enhancements to rescue chip developers from high-k gate oxide delays. Now, after three years of preparation and prototyping, lithography vendors are ready with their own bailout: immersion scanners that boost resolution to 45nm lines and spaces.

The immersion-enhanced 193nm tools come to the market as NAND vendors move to multigigabit densities and as microprocessor and DSP developers seek lenses with higher numerical aperture (NA) to form the four or five critical layers of their logic transistors.

ASML has started shipping its Twinscan XT:1700Fi scanner with a 1.2NA lens. In January, Nikon said it had shipped an immersion scanner with a 1.07NA lens to a Japanese customer, most likely Toshiba and its flash memory partner SanDisk. By the end of this year, Nikon expects to be shipping a scanner with a 1.3NA lens to compete with the ASML offering.

Immersion has arrived just in time for the semiconductor industry. Materials problems bedeviled efforts to reduce scanner wavelengths to 157nm. Extreme-ultraviolet lithography (EUV) solutions are in the worksASML expects to ship two full-field EUV prototypes soon to the Interuniversity Microelectronics Center and the Albany NanoTech consortium for mask and resist infrastructure developmentbut market availability is still several years away.

Thus, chip vendors are eager to bring immersion online for designs at 65nm and below. By taking advantage of the 1.437 refractive index of water (air's index is 1), lithography vendors for the first time are moving their lenses into the "hyper NA" regime, beyond the 1.0NA possible with "dry" scanners.

Depth of field
By bending the light at a sharper angle as it moves through a thin film of water, scanner makers can improve resolution. And immersion permits recovery of some of the depth of field that's naturally lost when higher-NA lenses are employed. According to several studies, depth of field nearly doubles with immersion lithography, a critical improvement for printing high-aspect ratio features such as contacts.

IBM plans to use immersion lithography for critical levels of its 45nm transistors, said Lisa Su, VP of the company's semiconductor operation. "We are fairly pleased with how immersion has come up," Su said. "For the 45nm generation to succeed, lithography, transistor design and strain from the process all have to be in line. The big constraint as the industry goes from 65nm to 45nm will be to maintain the cost equation, and costs are not as bad as they may seem."

That said, immersion scanners don't come cheap. The new ASML product reportedly costs about $26 million, and some analysts expect price tags to reach $40 million for the most advanced models.

Flash vendors are among the most impatient for immersion tools. "We will need immersion lithography at the 55nm node," said Eli Harari, CEO of SanDisk Inc. The company expects to use 1.3NA tools for production, he said.

SanDisk and Toshiba plan to roll out their 55nm NAND flash chips by "early next year," Harari revealed at the SEMI Strategic Business Conference last April.

NAND in driver's seat
Lithography vendors typically divide sales into two roughly equal camps: logic and memory. Traditionally, DRAMs have driven first to the most aggressive line widths, with logic about 18 months behind, said Bill Arnold, chief scientist at ASML's Phoenix operations. Over the past two years, however, NAND flash vendors have been the most aggressive.

"The NAND shrink ratethe flash vendors' progress in increasing densityhas been gated by our progress in tools," said Arnold.

ASML is also being pushed by its logic customers to the limits of patterning. ASML's 1700i is specified at 45nm lines and spaces, but only for the dipole form of illumination used by memory vendors, with their regular patterns and single-axis configurations, Arnold said. Logic vendors--depending on the mask layertend to use an annular or "quasar" form of illumination, which resembles a windmill with light patterns coming at what would be the 2, 4, 8 and 10 o'clock positions. Annular exposure with the 1700i will support exposures down to about 50nm lines and spaces, he said.

ASML expects to introduce a lens with an NA exceeding 1.4, perhaps next year, Arnold added.

To achieve viable hyper-NA lenses, designers have shifted fully from conventional, refractive lens designs, which would be too large and heavy for the application, to catadioptric designs, which combine glass refractive lens elements with mirrors.

Immersion lithography still uses 193nm-wavelength light, produced by argon fluoride lasers. To create patterns in the 45nm range, or about one-fourth the wavelength of the light, technologists must use a complex combination of enhancement techniques, said Christian Kalus, CTO of Sigma-C, a technology-CAD vendor that specializes in lithography simulation.

The polarized light required for effective immersion lithography requires an understanding of both the electrical and magnetic components of light. For high-NA lenses, lithographers must treat light as an electromagnetic wave.

"It's a big challenge to use 193nm light for these ever-smaller feature sizes. In the past, we have dealt with the mask as a 2D structure, but now we must simulate the mask as a 3D object and bring in Maxwell's equations," Kalus said.

The use of immersion 193nm tools for the 45nm and even 32nm technology generations will require mastery of oblique-incidence light and polarization effects. For Sigma-C and its modeling tools, the complex interaction between the direction of the light and the materials used in the mask requires a larger simulation area at equivalent accuracy.

"The companies that will gain an advantage are those that understand how to use polarization effects in a constructive way to increase contrast," Kalus said.

Keeping down defects
The big worry with immersion has been defectsthe yield killers that must be reduced to a few particles per square centimeter. Because the thin film of water rests directly on top of the resist, chip vendors have worried that chemicals would leach out of the resist into the water. Similarly, water could enter the resist layer and foul an already delicate chemistry.

Indeed, chemically-amplified resists are proving difficult to improve, and line edge roughness (LER) has been a concern as designs scale to 4nm. Poor contrast and LER can worsen transistor variability, which contributes to timing irregularities, power dissipation and transistor sizing difficulties.

Gregg Bartlett, VP of CMOS technology at Freescale Semiconductor Inc., said Freescale will use immersion tools starting 2008, but "only for the handful of critical layers that demand it," such as gate patterning, first metal, contacts and via formation.

Other layers can be patterned with dry 193nm tools and various reticle-enhancement techniques, Bartlett said. And alternating phase-shift masks are being used more widely to improve patterns with both dry and wet lithography techniques.

"There is some trepidation about defectsthat is always true with something new like immersion," Bartlett said. "And cost is a barrier. These high-NA tools are very expensive. But we will take the plunge."

- David Lammers
EE Times

Additional reporting by Mark LaPedus




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