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Lattice develops FPGA-based SPI-4.2 device

Posted: 15 Aug 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Lattice? System Packet Interface Level 4? SPI-4? LatticeECP2? FPGA?

Lattice Semiconductor Corp. has developed what it claims is the industry's only full rate SPI-4.2 product based on a low-cost FPGA fabric.

The product consists of a LatticeECP2 FPGA plus a Lattice-developed soft Intellectual Property (IP) core that is fully compliant with the Optical Internetworking Forum's (OIF) System Packet Interface Level 4 (SPI-4) Phase 2 Standard, a parallel interface found in telecom and datacom applications at 10Gbps rates and below.

Before this product was available, designers typically implemented full rate SPI-4.2 bridges supporting complex packet flow and traffic management policies only on premium FPGA devices since low-cost FPGAs could not support the I/O or logic speeds.

The ability to operate at the full 10Gbps line rate is made possible by Lattice's sysI/O interface structure, which contains pre-engineered elements designed to support the implementation of fast, source synchronous interfaces such as DDR2 and SPI-4.2.

By delivering high-end FPGA features and performance in its low cost LatticeECP2 FPGA fabric, Lattice says it is able to provide the first FPGA-based SPI-4.2 interface requiring less than $5 of FPGA logic in production volumes.

Lattice's SPI-4.2 soft IP core for the LatticeECP2 is available now. List price for the core is $15,000 for the netlist version.

- Ismini Scouras
eeProductCenter




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