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Exar augments ExtendAR 48M series of MPOS framers

Posted: 01 Sep 2006 ?? ?Print Version ?Bookmark and Share

Keywords:Exar? XRT95L52? XRT95L50? multiprotocol over SONET/SDH? MPOS?

Exar Corp. has added the XRT95L52 and XRT95L50 to its product portfolio of universal OC-48/STM-16, Quad OC-12/STM-4 and OC-3/STM-1 multiprotocol over SONET/SDH (MPOS) framers.

According to the company, these new devices support flexible packet framing and encapsulation features combined with optimal SONET/SDH and PDH transport capabilities. They are suitable for low-cost add/drop multiplexers, optical edge devices, multiservice provisioning platforms and multiservice access applications.

"Driven by increasing bandwidth demands from businesses and consumers, the market continues its steady migration to packet-based infrastructures," said Al Gharakhanian, Exar's VP for marketing, network and transmission products. "Exar's newest MPOS framers are ideal as they not only support current and future network requirements, but address needs raised by our customers."

The new devices support flexible encapsulation and framing features including GFP, LAPS, ATM and PPP/BCP. They also support an on-chip STS-1 cross-connect that is capable of adding/dropping traffic at an STS-1 level of granularity to external line interface/mapper devices. This feature enables highly integrated yet flexible line cards and allows the devices to use one of the OC-12/OC-3 interfaces as a client access port for metro access applications.

The XRT95L52 is targeted for optimally mapping voice, data or video over next generation metro networks with features such as GFP in combination with virtual concatenation (high order and low order) and LCAS, and framing functions such as LAPS, PPP/BCP, and ATM. The XRT95L52 supports high order and low order virtual concatenation together with LCAS in a single device enabling optimal utilization of SONET bandwidth.

The XRT95L50 incorporates 48 DS3/E3 framers as well as fractional framers on a single chip together with mapper functions such as GFP, LAPS, PPP/BCP and ATM. This enables the device to aggregate and map PDH traffic into packets which is ideal for the access markets. The XRT95L50 also supports fractional DS3/E3 framers on a single chip which eliminates the need for these functions elsewhere in the system enabling a more modular system architecture.

Samples of the new devices will be available within two months. The products are available in a 780-ball PBGA and operates at 3.3V with 5V tolerant I/Os over the industrial temperature range. Both devices are pin-compatible with XRT95L53. In 1,000-piece quantities, the XRT95L52 is priced at $295 and the XRT95L50 at $200.




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