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DTV decoder addresses PVR requirements

Posted: 30 May 2007 ?? ?Print Version ?Bookmark and Share

Keywords:DTV decoder? USB 2.0? Triple DES encryption/decryption?

Fujitsu Microelectronics Europe has announced the latest member of its SmartMPEG family, the SmartMPEG-C, an advanced DTV decoder designed to meet the needs of tomorrow's STB and IDTV market.

Using Fujitsu's CMOS 90nm process technology, the SmartMPEG-C includes features that support personal video recorder (PVR) applications including two video decoders, hardware DMA and encryption. It also includes an LCD output channel to enable simple connection to an LCD panel and HDMI transmitter. A 202.5MHz ARC Tangent-A4 CPU with 2Kbyte data and 4Kbyte instruction cache is included. The CPU is connected to a shared 16bit DDR RAM using a 135MHz bus.

The SmartMPEG-C device supports multiword DMA ATA interface (16Mbps) and includes a USB 2.0 High Speed OTG link controller for connection to USB hosts or devices. Supporting the system is an advanced hardware acceleration unit capable of performing DMA operations including complex operations such as Triple DES encryption/decryption and RGB to 4:2:2 color space conversion. The write-back unit behind the scaler allows the implementation of a fast Mosaic Mode.

The system is optimized for PVR applications with two video decoders and output units, three independent transport stream decoders and a hardware DMA controller. The SmartMPEG-C comes with the Fujitsu Driver Application Programming Interface (FAPI) to help customers achieve the shortest possible development cycle. FAPI is a complete driver set allowing fast and efficient customer software design. Moreover, Fujitsu provides the PVR middleware, which offers stable handling for recording, playback, time-shift and trick modes.

The product also features two hardware MPEG-2 video decoders MP at ML, two flexible MPEG video resizing units (factor 0.0625 to 2) and a four-layer display controller (true-color or CLUT). The decoder also features individual CLUT, flicker and flutter fixer for each layer and offers flexible frame rate conversion of 50/60Hz.

The device also offers ITU-R 656 video I/O, RGB de-matrix (RGB or YCrCb output) and a seven-segment LED and five-digit keypad controller.

Designed using Fujitsu's CMOS 90nm process technology, the SmartMPEG-C has a low power consumption of 450mW (typical). It is offered in both a 256-pin BGA and 240-pin FBGA packages and has an ambient operating temperature range of 0C to 70C demonstrations.

Development kits and samples are now available.




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