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MediaTek, Apache take on 65/45nm design challenges

Posted: 14 Sep 2007 ?? ?Print Version ?Bookmark and Share

Keywords:65/45nm? design challenges? EDA tools?

Apache Design Solutions announced that MediaTek, a Taiwan-based fabless semiconductor company, has selected Apache as their EDA partner for addressing 65- and 45nm physical design challenges.

The MediaTek-Apache collaboration will focus on areas of power and noise, including power signoff, advanced low power and leakage optimization, reliability methodology, thermal integrity, and IC-package noise management.

Through the MediaTek-Apache partnership, MediaTek plans to establish power and noise signoff flows for their 65- and 45nm high performance and low power designs based on Apache's advanced technologies, as well as existing products such as RedHawk-EV, RedHawk-ALP, PsiWinder, Sahara-PTE and Sentinel. In addition, the companies will share their expertise in methodology and signoff for SoC silicon integrity.

"At 65- and 45nm, we are seeing numerous designs with power and noise challenges, and forging a partnership with an EDA tools provider will enable us to manage and anticipate the upcoming needs," said MediaTek. "Our collaboration with Apache gives us access to market leading signoff technologies and in-depth technical expertise from a world-class R&D and support team, which will help us gain greater confidence in the success of our 65- and 45nm tapeouts."

"We look forward to the technical collaboration with MediaTek and developing new solutions for our silicon integrity platform that meet their current and future needs," said Dian Yang, general manager and VP of product management of Apache.




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