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Handling multicore design patterns

Posted: 18 Feb 2008 ?? ?Print Version ?Bookmark and Share

Keywords:embedded debug? multicore embedded microprocessors? asymmetric multiprocessing? DSP? network processor?

Consolidation is a long-standing trend in embedded design. It enables higher-performance embedded devices using fewer components at lower cost and power budgets. The latest round of this trend is the proliferation of multicore embedded microprocessors, offering multiple processor cores in a single packagewith lower power consumption and cost than an equivalent single-core processor.

Taking advantage of multiple processor cores requires more system-level design cooperation between software and hardware teams. In that spirit, here are overviews of three simple models for multicore systems that are straightforward to implement with today's tools and hardware. These multicore design patterns are not intended to be rigid models for exactly specifying a system. Rather, they are starting points for thinking and talking about the high-level picture of what your system does, and provide a common terminology so that hardware and software teams can hash out a multicore system structure.

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