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Commentary: Integration in wireless SoCs may be cost-defective

Posted: 16 Jun 2008 ?? ?Print Version ?Bookmark and Share

Keywords:wireless? SoCs cost-defective? integration commentary?

The electronics industry, particularly the embedded electronics sector, is so closely geared to the International Technology Roadmap for Semiconductors (ITRS) that it is easy to forget it is equally governed by commercial realities. But while the public profile of the ITRS may be one that suggests technological advancement at all costs, its actual positioning statement is more explicit: "The objective of the ITRS is to ensure cost-effective advancements in the performance of the IC and the products that employ such devices, thereby continuing the health and success of this industry."

The industry faces an interesting dilemma then: How much functionality should it integrate on a single device to be cost-effective?

A case in point is the integration of Bluetooth and Wi-Fi, which operate in the same ISM bandwidth, within a single device.

The hypothesis that integrating the two technologies is desirable is based on three assumptions. First, that integrating the technologies on a single piece of silicon will reduce the amount of silicon used, and therefore the cost; second, that integration will create better interoperability and coexistence between the two technologies; third, that integration would represent an acceptable level of risk. Let's look at each of these assumptions and at other factors to compare the true cost of integrated vs. discrete solutions for Bluetooth and Wi-Fi in a single-end application.

The resources that are considered in this scenario are memory and radio circuitry.

For some of the time at least, both the Bluetooth and Wi-Fi functions will be operating simultaneously. There is an absolute minimum memory requirement to operate Bluetooth and Wi-Fi and given that both may be operating simultaneously, it will always be necessary to maintain those minimum RAM and code memory requirements during operation. Therefore, the memory requirements for an integrated Bluetooth/Wi-Fi solution are likely to be identical to those of discrete solutions.

As for sharing the same radio resource, the fundamental issue is the differences, not similarities between the two radio technologies. Bluetooth operates in a 1MHz bandwidth with frequency hopping across the band every 625?s, while Wi-Fi occupies a constant 20MHz bandwidth. Hence, there would be a need for separate synthesizers, filters and transmission paths within the chip, with the added risk to performance associated with combining the radio circuitry into a single RF block.

As there would be no significant reduction in either the memory or the circuitry in combining Bluetooth and Wi-Fi in a single chip, there is no guarantee of reduced cost compared to discrete devices.

Packaging, other pitfalls
There is also no guarantee that packaging a single-chip device would be cheaper than a two-chip solution. Since both technologies need to be tested individually, whether implemented as a single device or two, the total test time is unlikely to be reduced. Furthermore, failures during test will also represent a higher cost for a single-chip solution.

The attach rate for Wi-Fi in mobile applications is much smaller than the comparable figure for Bluetooth. The figure shows attach rates for Bluetooth will exceed 60 percent by 2010, while the figure for Wi-Fi will only be approaching 10 percent. For these devices, a single-chip solution will always play a minority role as a connectivity option. There are a number of emerging mobile devices, such as VoIP phones and Internet radios that only use Wi-Fi technology. These devices would attract better pricing for the Wi-Fi part than a low run-rate combination chip, and the same is true for Bluetooth. The figures imply, therefore, that discrete solutions would hold greater financial potential than a combination device.

One issue that hasn't been discussed so far is the ability of manufacturers to assemble combination silicon. In most cases, the fine ball pitch of single-chip combination necessitates the use of a module to mount the device. There would be no significant pin count reduction resulting from putting the two technologies side by side on one piece of silicon, hence combination devices will face ball distribution issues, since there is a finite number of balls that can be placed in a fixed area of silicon.

This will lead to a reduced pitch between the balls that cannot be mounted using available PCB technologies. The solution to this is to contract a module manufacturer to place the chip on a module, thus adding an additional and incremental cost.

One possibility for reducing pin count is to share power supply pins. Historically, placement of power and ground pins on RF designs can be critically important to the performance of these devices. Effective grounding and clean supplies are essential for RF operation and so reducing the number of ground and/or power points only increases the risk of poor performance.

There is also a case for supporting a single host interface to save I/O pins. This would more than likely be secure digital I/O (SDIO) and while this may save a couple of pins over the Bluetooth UART, the complexity of the driver for the host will increase. However, now, the use of separate SDIO and UART is not an issue.

Coexistence performance and risk
One of the arguments for combination devices is that they are able to exhibit superior coexistence between the two technologies. This is because by being integrated in the same silicon, the communications interface between the technologies is not limited by current-day 2- 3- and 4-wire coexistence schemes.

This is true; being able to predict behavior based on packet types and timing information is very useful in scheduling traffic. However, the argument is based on the notion that discrete solutions are bound to be using these archaic PTA solutions. This is like comparing the old-fashioned 2,400baud modems available in the 1990s to today's high-speed broadband links. The reality is that new communications interfaces between devices are being developed all the time, so there is no reason why a Bluetooth and Wi-Fi discrete solution could not employ a high-speed communications interface between them to achieve the same rate of information exchange as a combination chip.

Beyond the performance of wired communication between the two technologies, there are other, more subtle effects to consider; blocking performance and isolation. The blocking performance of a radio receiver is its ability to extract those signals intended for it, from other signals. It is affected by the gain of the receiver, which must increase as the distance from the transmitter increases, in order to identify signals that have progressively lower power. It is also affected by the receiver's separationor isolationfrom nearby sources of noise. The closer each receiver is to these sources of noise, including of course other radio transmitters, the less effective the blocking performance becomes.

Attach rates for Bluetooth will exceed 60 percent by 2010, while the figure for Wi-Fi will only be approaching 10 percent.

This drop in blocking performance effectively lowers the radio's overall performance and decreases its useful range, so instead of the anticipated improvement in performance, brought by coexistence, the net effect is negative.

Whenever two disparate technologies become co-dependent by integrating them on the same silicon, there is a clear risk that their individual rate of development will also be linked. This is true for Bluetooth and Wi-Fi; the Bluetooth standard continues to develop, through v3.0 and Ultralow Power Bluetooth. On the other hand, Wi-Fi solutions are only just beginning to incorporate 802.11n and as such, there will be a need to stabilize this technology. Tying part of a design to one version of one standard, in order for work to continue on the other, could make a combination device obsolete before it is launched.

The issues raised need to be addressed before exposing the supplier and manufacturer to the cost and performance risks associated with a single-chip solution.

By Gary Craggs
Technical Marketing Manager
Wi-Fi Strategic Business Unit
CSR plc





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