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National hails Synopsys as its key EDA partner

Posted: 30 Jul 2008 ?? ?Print Version ?Bookmark and Share

Keywords:EDA? analog? mixed-signal? design platform? IC?

Synopsys has announced that the company was chosen by National Semiconductor Corp. as its key EDA partner in product development. The partnership extends to the access of National to all of Synopsys' analog/mixed-signal and custom IC design tools and the possibility of collaborating in the next-generation solutions.

The close relationship is manifested in the recent agreement, where National selected several products among Synopsys' product portfolio such as Galaxy design platform, featuring IC Compiler place-and-route technology; Design Compiler synthesis; PrimeTime timing analysis; Star-RCXT parasitic extraction; Hercules physical verification; DFT MAX scan compression synthesis; and TetraMAX automatic test pattern generation. The Discovery verification platform featuring the VCS and HSIM simulators for analog and digital verification; and the Taurus Medici and Sentaurus device simulators from TCAD portfolio are also part in the list of their shared technology.

"Today's analog and mixed/signal products are requiring more complex EDA solutions," said James Lin, VP, technology infrastructure, National. "With Synopsys as a key EDA partner, we have the opportunity to work together in solving our current and future design needs," he added.

"We (National and Synopsys) have a number of common goals, like helping to create more power-efficient products in delivering the numerous capabilities to satisfy the users demand," said Aart de Geus, chairman and CEO, Synopsys. "We are fortunate to work closely with a reliable firm in mixed-signal design as we develop the next-generation custom IC solutions," he stressed.





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