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Controller LSI enables high-speed flash storage

Posted: 18 Aug 2008 ?? ?Print Version ?Bookmark and Share

Keywords:NAND flash? controller LSI? solid-state drive?

TDK Corp. has developed the GBDriver RA8 series of NAND flash memory controller LSI that are compatible with 2KByte/page and 4KByte/page NAND flash memories.

The U.DMA6 high-speed NAND controller ICs support single-level cell (SLC) and multi-level cell (MLC) NAND flash memories and make possible high-speed flash storage ranging from 128MByte to 16GByte in the case of SLC and 256Mbyte to 32Gbyte in the case of MLC.

The controllers provide high-speed control and incorporate 15bit ECC; an auto-recovery function common to the GBDriver series; and a collateral error prevention function in case of a power interruption. The controller IC design also enhances data reliability of NAND flash memory.

Improved memories
The GBDriver RA8 series also incorporates a new static wear leveling algorithm that averages the number of erased times of each memory block. This maximizes the rewritable life span of NAND flash memories. The scope of static wear leveling can be set to any range. Areas outside the scope of static wear leveling are subject to dynamic wear leveling.

Flash management functions also include an updated SMART function that determines the number of erased times of each memory block, facilitating quantitative evaluation, management, and operation of NAND storage systems. TDK will market industrial compact flash cards and solid-state drives equipped with new GBDriver RA8 controllers starting in October 2008.

The controllers target consumer and industrial embedded system devices and IT equipment such as digital cameras, camcorders, digital televisions, STBs, multi-function printers, car navigation systems, portable navigation devices, point-of-sales terminals, medical devices, measuring instruments, machine tools, factory automation panel computers and touch panel systems.

The GBDriver RA8 is compatible with PIO0-6, Multiword DMA0-4 and Ultra DMA0-6, and supports read access speeds up to 50MBps and write access speeds up to 35MBps (15MBps in the case of MLC).

Data protection
An original algorithm prevents collateral errors such as corruption of data other than the data being written if power is interrupted when writing data. A flash identification function also enables selection of 8bit/sector ECC or 15 bit/sector ECC to provide error correction capabilities with room to accommodate future developments. An auto-recovery function is also included to correct bit errors automatically when reading data repeatedly (read-disturbance errors).

The series also include an ATA-standard protection function, which allows customers to set and remove a password to protect important data. The number of erased times of data all memory blocks can be confirmed by using Smart Command, which allows for easy determination of the flash memory status and facilitates appropriate management.

The controllers are available in a 128-pin TQPF package and a 121-pin VFBGA package. Production will take place in Japan and sales are scheduled to begin in September.





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