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Viterbi decoder block decoding - Trellis termination and tail biting

Posted: 15 Sep 2008 ?? ?Print Version ?Bookmark and Share

Keywords:Viterbi decoder block decoding? Trellis termination? tail biting?

Many digital communication standards employ Convolution Coding as a means of forward error correction (FEC). Data encoded in this way generally is decoded with a Viterbi decoder, which operates by constructing a trellis of state probabilities and branch metrics. The transmitted data is often terminated with a number of zeros to force the encoder back to the zero state. This allows the decoder to start decoding from a known state, however, extra symbols have to be transmitted over the channel.

Another termination technique is to ensure the trellis start and end states are identical. This technique is referred to as tail biting and has the advantage of not requiring any extra symbols to be transmitted. Tail biting is used in several popular communications standards, such as IEEE802.16. This application note explains how to use the Xilinx Viterbi Decoder LogiCORE module (version 5.0 or later) to implement both trellis termination and tail biting.

View the PDF document for more information.





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