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MCUs with on-chip flash, SRAM suit driver-assist systems

Posted: 11 Nov 2008 ?? ?Print Version ?Bookmark and Share

Keywords:flash memory? SRAM? MCU? microcontroller?

SH74504, SH74513

Renesas Technology Corp. has released the SH74504 and SH74513, 32bit MCUs with on-chip flash memory for driver-assist system control to achieve "active safety" in automotive applications.

The SH74504 and SH74513 are built around the SH-4A CPU core. They provide ample memory capacity, combining 2Mbyte for the SH74504 and 1.5Mbyte for the SH74513 of embedded flash memory and 512Kbyte of on-chip SRAM. This provides support for driver-assist systems offering enhanced performance by enabling high-speed processing of the large volumes of sensor data required by obstacle detection and collision avoidance applications. The devices also offer advanced on-chip in-vehicle networking capability with five-channel CAN, and in the SH74504 two-channel FlexRay, a communication protocol for next-generation vehicle control applications.

Fabricated using 90nm process technology, SH74504 and SH74513 operate at 240MHz, touted to be the fastest in the industry for MCUs with on-chip flash memory, allowing them to achieve processing performance of 432 MIPS. In addition to their large-capacity on-chip flash memory, they have a wide operating temperature range of -40C to +125C, enabling them to tolerate the high-temperature environment demanded by applications such as driver-assist systems.

FlexRay support
In a driver-assist system, a sensor fusion electronic control unit (ECU) controls a lot of information detected by sensor ECUs, from milliwave radar and camera sensors, via a CAN network. The SH74504 and SH74513 increase the number of CAN channels from the two of comparable earlier products to five to accommodate the increasing number of sensor ECUs and actuator ECUs in high-performance driver-assist systems.

Furthermore, the volume of data transferred is expected to increase rapidly due to coordinated control among in-vehicle systems, and it is possible that the current CAN communication speed will become inadequate. To handle this, the SH74504 implements two FlexRay channels conforming to the next-generation basic standard. FlexRay 2.1 protocol has a higher communication speed than CAN networks and allows for greater flexibility in the amount data which is being transmitted; furthermore with two FlexRay channels the SH74504 allows for redundancy, which is needed in safety critical applications.

Peripheral functions
In addition, the SH74504 and SH74513 integrate the peripheral functions required by driver-assist systems. The three-channel direct RAM input interface (DRI) function supports direct parallel connection at up to 40Mbit/s from a CMOS camera with a maximum of wide VGA resolution to on-chip SRAM as a camera interface for the lane departure warning system, and a one-channel I ?C function is provided for camera settings. The full 512Byte of on-chip SRAM is sufficient to store the data for an entire photo, thereby contributing to more compact system size and reduced cost.

The on-chip peripheral functions also include a parallel DAC controller (PDAC) circuit for controlling the DAC required by a driver-assist system employing milliwave radar, a parallel selector circuit for channel control of a high-speed ADC, a DRI circuit ideal for capturing data from a high-speed external ADC, a TOU timer for controlling a brushless DC motor for mechanical milliwave scanning control, and a 65-channel ATU-IIIS (Advanced Timer Unit III) multifunction timer unit suitable for timing control.

In response to the constantly rising performance demands on driver-assist systems, the SH74504 and SH74513 incorporate the following communications functions:

  • a DRI and direct RAM output interface to minimize performance drag on the MCU's CPU caused by CPU-to-CPU communications functions

  • a bus controller that supports selection of the optimal data bus width (8-, 16-, 32bit) when utilizing an external bus

  • serial communication interfaces (SCIF) with FIFO

    There is also an on-chip direct memory access controller supporting data transfer to external bus areas to enable management of the above communication functions. By combining these functions it is possible to utilize the performance of the SH-4A CPU to the full and to achieve improved system performance.

    The SH74504 and SH74513 are housed in 17mm x 17mm BGA packages that with mounting area approximately 30 percent smaller than earlier LQFP product from Renesas. This package has multiplexed pins that can be assigned to more than one function. The number of functions per pin has been increased to six from four in comparable earlier products to provide support for a wider range of applications. Sample shipments will begin in February 2009 in Japan.





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