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FPGAs face EDA tool, designer shortage

Posted: 15 Dec 2008 ?? ?Print Version ?Bookmark and Share

Keywords:FPGA? EDA tool shortage? IC design?

The FPGA market has experienced lackluster and flat growth in recent times it now faces a set of new challenges that could threaten the business.

Like most chipmakers, FPGA suppliers face the current and steep IC downturn. In one form or another, Actel, Altera, Lattice, Xilinx and others have been impacted by the downturn.

Simon Bloch, VP and general manager of the design and synthesis division for Mentor Graphics Corp., also said the FPGA business faces four other major challenges: growing design complexity; lower power methodologies; a shortage of IC designers; and the fact that the EDA tools are running out of gas.

"At same point, the tools don't scale anymore," Bloch warned. "You need (new and) disruptive tools in the flow."

It's unclear if the Mentor executive was taking a pot shot at rivals or the FPGA houses, many of which offer their own design environments. Nonetheless, the problem is that leading-edge FPGAs are scaling to 40nm and beyond, but the tools have not caught up with these new and complex processes.

Within the FPGA world itself, there is good and bad news. Over the years, FPGA design starts have been "quite flat," Bloch said during a keynote address at the FPGA Summit here on Tuesday.

On the other hand, "there is good reason for optimism," he said. FPGAs "are one of the growth segments in the semiconductor industry."

More complex
FPGA houses are attacking the market on several fronts. For example, Altera Inc. recently rolled out a leading-edge 40nm FPGA. And Actel Corp. has introduced what it claims is the world's lowest-cost FPGA.

The products from various vendors have created some new issues. In the old days, FPGAs were easy to design and program. "Now, they are getting more complex," Bloch said. "The biggest impediment for FGPAs is complexity. We are benefiting from the shrinkage in process technology, but we are paying the price in complexity."

Besides complexity, there is another problem that could hamper FGPA growth. "There is a shortage of skilled designers in FPGAs," he said.

Even if there were enough designers, the EDA tools are in real need of improvement. "Traditional design flows are not scaling anymore," he said.

The Mentor executive offered some solutions to the EDA problem: IP reuse; low-power design methodologies; and high-level synthesis.

"Ever increasing design size and complexity have pushed traditional RTL methodologies to their limits. Design requirements and time-to-market pressures are combining to make it impossible for designers to find optimal RTL implementations within their allotted schedule. High-level synthesis reduces manual effort required to produce RTL, and enables designers to avoid syntax errors common in traditional methodologies," according to Mentor's Website.

Market slump
More bad news are coming to FPGAs. Altera Corp. has lowered its Q4 revenue guidance range from $346 to $360 million, up 1 percent to down 3 percent sequentially, to $314 to $325 million, down 9 to 12 percent.

"Management attributed the deterioration in demand trends to a broad-based slowdown across all end markets with particular weakness in the computing and consumer related end markets," said John Barton, an analyst with Cowen and Co. LLC, in a report.

"We believe Altera's competitor, Xilinx, is experiencing similar demand weakness in the current quarter," he said. "As a result, we are lowering our 3Q 09 revenue estimate (for Xilinx) to $434 million, down 10.2 percent sequentially and our 3Q 09 EPS estimate to $0.29."

- Mark LaPedus
EE Times





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