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IMEC tools optimize multiprocessor SoC design

Posted: 17 Apr 2009 ?? ?Print Version ?Bookmark and Share

Keywords:IMEC tool? SoC multiprocessor? embedded system?

IMEC has unveiled a suite of tools and methods to optimize the mapping of applications on embedded multiprocessor SoC (MPSoC) platforms. These result in systems that are more energy-efficient and that can be designed faster, leading to a shorter time-to-market. IMEC's MPSoC tools are intended for companies that design multicore platforms for tomorrow's nomadic and multimedia applications. They are offered under a technology transfer or license agreement.

The first industrial MPSoC platforms have already found their way into embedded systems for advanced entertainment and communication platforms. In addition, the ever increasing performance hunger of battery-operated embedded devices, such as cellphones or portable media players, also calls for multicore architectures. But mapping applications efficiently on MPSoC remains challenging. Due to the vastness and complexity of the design space, i.e. the number of design options, this task is virtually impossible without the proper tool support.

The IMEC MPSoC technology provides solutions by focusing on design-time application mapping. The technology's two main threads offer support for fast parallelization (with the Multiprocessor Parallelization Assistant tool) and support for memory hierarchy optimizations (with the Memory Hierarchy tool).

IMEC's tools, methods and associated services have been used by industrial partners for commercial embedded systems as well as for in-house IMEC MPSoC implementations, e.g. IMEC's advanced multi-core platform for software-defined radio and a multicore multimedia platform using 6 of IMEC's ADRES processor cores. Interested companies may license the tools, or acquire them under a technology transfer agreement.





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