Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > Interface
?
?
Interface??

Measuring skew margin on 4-channel deserializers

Posted: 02 Jun 2009 ?? ?Print Version ?Bookmark and Share

Keywords:deserializer? skew margin? jitter tolerance?

The skew margin of an LVDS deserializer is an indication of its jitter tolerance. This application note describes conditions that can limit skew margin, and it presents a procedure for measuring skew margin on 4-channel deserializers.

RSKM is a valid timing window in which a deserializer can correctly sample LVDS input data. To sample the data within the data-bit time (unit interval), a timing strobe signal is generated from the LVDS input clock. Ideally, this strobe signal should be positioned in the middle of the data pulse, so the maximum RSKM can approach half of the LVDS data bit. However, many non-ideal, internal and external conditions can reduce the available timing margin to the point where the sampling window closes and data "errors" develop.

View the PDF document for more information.





Article Comments - Measuring skew margin on 4-channel d...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top