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Logic prototcol analyzer handles PCIe 3.0

Posted: 19 Apr 2010 ?? ?Print Version ?Bookmark and Share

Keywords:logic analyzer? PCIe 3.0? oscilloscope?

TLA7000 logic analyzer

Tektronix has released the TLA7SA16 and TLA7SA08 logic protocol analyzer modules with bus support software and probes to give PCIe 3.0 developers an exclusive time-correlated view of system behavior, starting with protocol analysis and working down to the PHY to debug the root cause of elusive problems.

Protocol analyzer capabilities include flexible, integrated data views for analyzing and displaying protocol traffic flow correlated with PHY events. Logic analyzer capabilities include a wide range of probing options, sophisticated triggering and time-correlated waveform and disassembled listing data displays of raw symbols and lane data. The new PCIe solution expands the TLA7000 series of high-performance logic analyzer family and works with TLA7000 mainframes including TLA7012 portable and TLA7016 benchtop models.

Using real-time and HW-accelerated, post-processed statistics displayed in the new Summary Profile Window, the logic protocol analyzer lets users quickly assess system health, identifying artifacts and patterns of interest (errors, specific transaction types, ordered sets, etc.). A single Transaction Window provides views of protocol behavior at the packet and transaction level interspersed with physical layer activity, while the Listing Window shows packet details at the symbol level by lane. Individual lane activity can be correlated with analog waveforms from a high bandwidth oscilloscope in the Waveform Window.

The new TLA7SA16 and TLA7SA08 Logic Protocol Analyzer modules provide x8 and x4 lane support respectively with support for 8GTps acquisition rates and support for PCIe link widths from x1 through x16. The modules are fully compatible with previous generation PCIe specifications. The modules dynamically track changes in link width, link speed, bus power state changes and include a powerful trigger state machine that spans all layers of the protocol (physical, data, link and transaction).

Up to 16Gbyte deep memory (for x16 link) increases chances of capturing both an error and the fault that caused that error. To make maximum use of memory, users can store everything on the bus or use real-time hardware filtering and conditional storage to store selected transactions over an 11-day period.

The Tektronix PCIe 3.0 modules deliver a comprehensive selection of probes, ensuring that test equipment doesn't impose design constraints. Probing solutions, including midbus, slot interposer and solder-down connectors, support PCIe 3.0 channel lengths up to 24 inches with two connectors, offering minimal electrical loading with the highest signal fidelity and active equalization to ensure accurate data recovery of closed eyes. All probes feature a graphical lane swizzling capability for maximum flexibility to accommodate unique circuit board layouts.

In addition to the new logic protocol analyzer solution, Tektronix provides a full set of test equipment for PCIe 3.0 electrical validation and debug. At 20GHz, the DPO/DSA/MSO70000 series oscilloscope enables capture of the 5th harmonic of the 4GHz fundamental. Serial Data Link Analysis software enables channel de-convolution and de-emphasis removal. DPOJET Jitter and Eye-diagram Analysis software provides jitter, eye-diagram and parametric testing. And the P7520 TriMode Differential Probe is available for validation and debug of chip-to-chip links, including common mode measurements.

The Tektronix Logic Protocol Analyzer solution for PCIe 3.0 is available now. U.S. MSRP for TLA7SAxx modules starts at $60,000.

- Toni McConnel
Embedded.com





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