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Cadence seeks stronger presence in Asia Pacific

Posted: 11 Apr 2011 ?? ?Print Version ?Bookmark and Share

Keywords:EDA? China EDA? growth drivers? Asia Pacific? Cadence's strategies?

The Asia-Pacific region, including China, has emerged as the EDA industry's growth center in recent years. Seeking to maximize the opportunities offered by a booming Chinese market, Cadence Design Systems Inc. has entered into a collaborative agreement with China-based Spreadtrum Communications Ltd.

In an interview with EE Times, Charlie Huang, senior vice president and chief strategy officer at Cadence, discussed the current semiconductor landscape in China, what Cadence is finding through its R&D facilities in the nation, the company's latest efforts, key industry trends and developments, and how these will affect the semiconductor industry at large.

Charlie Huang

Huang: Migration to new process nodes also drives investment in new EDA technology.

EE Times: According to EDA Consortium's (EDAC) latest report, for the third consecutive quarter, the Asia-Pacific region has overtaken Europe and Japan as a consumer of EDA software and services, and has benefited the most from sales in the fourth quarter of 2010. The Asia-Pacific region revenue represented $313.1 million in the fourth quarter of 2010, a 48.9 percent increase compared to the same quarter in 2009. The four-quarters moving average increased 39.6 percent.

Given these impressive figures, what are the key growth factors, more particularly in China?

Huang: The demand for "applications" is driving a new generation of design, not only for smartphones, but also for automobiles, entertainment devices, appliances and even commercial and industrial systems. Applications-driven design creates greater complexity and interdependency between hardware and software and places greater demands on design verification and verification management.

Another market trend that affects design is the drive toward "mobility" in areas like videoconferencing, mobile gaming, mobile TV and mobile workspaces. This obviously increases demand for low-power design capability, but it also requires improved mixed-signal design capability to handle the media streams and RF communications channels.

Migration to new process nodes also drives investment in new EDA technology. As manufacturing issues have become more complex, designers find they must address the issues throughout the design cycle because waiting to find and fix them at the end is too costly and risky. That means design teams must upgrade their design flows, particularly in the area of the implementation.

EE Times: Is it likely to continue at this pace?

Huang: Forecasts for the semiconductor industry show a wild ride over the past couple of years. According to the WSTS, annual growth went from -9 percent in 2009 to 30 percent in 2010 and is expected to run about 5-6 percent in 2011.

The EDA industry had a similar pattern, with down years in 2008 and 2009. But the EDA Consortium is forecasting growth in the high single digits for both 2010 and 2011.

Interestingly, the EDAC figures also show that most of the growth in EDA for the past few years has come from the Asia-Pacific region, including China. Based on that fact plus the overall upward forecast from EDAC, one would expect the China market for EDA to be fairly strong for at least the next couple of years.

EE Times: Who are you targeting, multinational companies doing design activities in China or regional companies growing their use of EDA tools? And, how does Cadence plan "to bridge the geographic semiconductor gap between the two nations"?

Huang: Cadence aims to serve both multinational and local companies in China, as we do in the rest of the world. We deliver our design technology in different ways to suit each type of company. For example, we can create a secure, turnkey design environment with a proven design flow and foundry process kitsall ready for a local startup to access over the Internet, with no local installation required. On the other hand, large multinationals may create their own virtual design environments, using Cadence technologies installed and maintained by their own CAD departments.

EE Times: Can you describe the semiconductor landscape in China? And, have you observed specific EDA needs and requirements that have oriented your R&D activities?

Huang: Chip fabrication capability in China is catching up with the leading edge, though not there today. Chip design capability is already on the leading edge in some areas, such as custom and mixed-signal. The requirements for design tools used in China are mostly the same as those for other countries, so it is generally not necessary to customize R&D activities for any particular region. However, we do customize our delivery mechanisms to suit different customers in different regions. For example, a small startup in China might need a cloud-based, turnkey design flow for 65nm, while a large global company might install and maintain a similar design flow in its own CAD department.

EE Times: What have been Cadence's early steps to set presence (local offices, investments, partnerships, etc.) and build confidence?

Huang: Cadence established an office in China in 1992 and has been a leading EDA company there ever since. We partnered early with the government and helped establish training and design infrastructure for the nation. Today Cadence has more than 350 technical support, sales and R&D staff in China. In addition to support of government initiatives, we provide solutions for 400+ customers across all industries in China: aerospace, communications, computing, CE, IC design and manufacturing. We enable those who are just entering the ecosystemmany IC incubation centers and IC design startup companies.

EE Times: What is Cadence's short, mid- and long-term strategy to seize the opportunity and, in the best of cases, become the primary EDA tool vendor in the region?

Huang: Cadence is focused on improving end-product profitability for customers. Our vision for the industry, called EDA360, encompasses the entire spectrum of the electronic design process and supports an application-driven approach for creating, integrating and optimizing designs that help customers realize silicon chips, SoC devices and complete systems at lower costs and with higher quality.

EE Times: Is the competition fierce on the EDA front with big guys (Mentor, Synopsys, Magma) and with smaller but growing companies (EVE, SpringSoft, Tanner EDA, etc.)?

Huang: All of the EDA industry competes fiercelyand also cooperates closelyin order to meet customer needs and move the industry forward.

EE Times: Can you name Cadence's customers in China?

Huang: Some companies prefer to keep vendor relationships confidential, but here are a few customers or partners in China who have given us permission to mention their names: Chipsbank Microelectronics Co. Ltd; HiSilicon; Huaya Microelectronics Inc.; Innofidei; VeriSilicon; SMIC; Shanghai Eastwell Technology; Shanghai Huahong Integrated Circuits Company Ltd (SHHIC); and Chinese Academy of Sciences Institute of Computing Technology (ICT).

- Anne-Fran?oise Pele
??EE Times





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