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USB solution features built-in self-test

Posted: 30 Jun 2011 ?? ?Print Version ?Bookmark and Share

Keywords:USB 2.0? host controllers? PHY IP?

Evatronix SA has released its USB High Speed PHY IP to complement its suite of USB 2.0 device and host controllers.

According to Evatronix, the USB 2.0 PHY is silicon-proven and guarantees compliance with USB specification for high, full and low speeds.

"With the release of our USB 2.0 PHY we passed the next significant milestone in our strategy to offer complete front-to-back IP solutions," said Wojciech Sakowski, Evatronix CEO.

Evatronix said the release of the USB 2.0 PHY enables the company to seamlessly assist its customers in all their development stages from architectural concept to tapeout."

The Evatronix USBHS-PHY is a complete mixed-signal transceiver macro-cell that implements the USB 2.0 physical layer for host and device applications. It is compliant with the UTMI+ specification.

It features a built-in self test, self calibration termination and pull-up resistors for seamless operation. It also supports regular 3.3V analog and 1.8V digital core supplies, both with 10 percent of voltage tolerance.

The Evatronix USBHS-PHY logic macro is available on the LFoundry 150nm process with the possibility to port it to any technology node from 45nm to 180nm.





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