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Tri-gate rouses Intel-ARM rivalry

Posted: 11 Aug 2011 ?? ?Print Version ?Bookmark and Share

Keywords:tri-gate? transistor? 2nm node?

Rivalries between companies have a charm of their own. For many years, Intel vs. AMD was the talk of the town, and then it became Microsoft vs. Google. The most interesting rivalry today is, of course, Intel vs. ARM.

At the moment, it certainly looks as though ARM will go planar at the 22nm node, while Intel will go tri-gate. To judge if tri-gate offers Intel a significant advantage, a few questions need to be answered:
???Intel announced that their 22nm tri-gate transistor consumed 50 percent lower power when compared to their 32nm planar transistor. But what are the power savings for a 22nm tri-gate transistor when compared to a 22nm planar transistor?
???How much chip power can one save by using a 22nm tri-gate transistor in a microprocessor instead of a 22nm planar transistor? Is it 10 percent? Or is it 30 percent? Or is it 50 percent?
It is not difficult to get estimates for these. Let's take a look.

Transistor-level calculations

Transistor I-V

Figure 1: Transistor I-V characteristics shown in Intel's press announcement.

Intel showed some detailed transistor I-V curves in their press briefing. These are reproduced in Figure 1. Using this data, you get the information shown in Figure 2. You'll notice that the 22nm tri-gate transistor can give a 140mV supply voltage reduction compared to the 22nm planar transistor. The 22nm tri-gate transistor also provides a 50 percent power reduction compared to the 32nm planar transistor, but this advantage drops to 19 percent when compared to the 22nm planar transistor.

Transistor-level comparisons

Figure 2: Transistor-level comparisons of tri-gate and planar transistors.

Chip-level calculations
I then used IntSim, an open-source IC simulator, to estimate benefits of tri-gate transistors at the chip level. IntSim has models that describe various aspects of a modern-day chip, and its results show a good fit to actual data from past Intel microprocessors. For more details, please refer to Figure 3 and the original paper about IntSim at the 2007 International Conference on Computer-Aided Design (ICCAD).

IntSim

Figure 3: IntSim, a chip simulator, was used for this analysis.

For this study, I considered a 1GHz mobile logic core built with either (1) 22nm planar transistors, or (2) 22nm tri-gate transistors. Since Intel presented only relative numbers for transistor performance, I took numbers from the International Technology Roadmap for Semiconductors (ITRS) and scaled them based on Figure 2.

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Figure 4: Power savings estimated with IntSim.


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