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Design smart gas and water meters with superior energy efficiency

Posted: 13 Jan 2012 ?? ?Print Version ?Bookmark and Share

Keywords:Electronic water? gas meters? TX link?

A better approach is to use a dedicated input capture timer that can operate autonomously while the device is in sleep mode. This technique has a number of advantages over a software-based approach. Primarily, the switch closures can be accumulated in a hardware register requiring little if any CPU intervention.

Additionally, features, such as switch de-bounce, pull-up resistor management and self-calibration, can be integrated directly in the hardware. With two timer inputs, quadrature decode functionality can be supported to determine flow direction. This provides the capability of back-flow detection as well as an anti-tamper provision. A dedicated low-power input capture timer can consume as little as 400 nA at 3.6 V even with a sampling rate as high as 500Hz. This is a significant improvement over performing this function in software.

When a CPU is running, it typically fetches instructions from non-volatile memory (e.g. flash). It is not uncommon for 40 percent of the active mode current to be attributed to flash access reads. For this reason, any time we are able to move data using dedicated hardware peripherals instead of the CPU, we can save power.

When preparing a message for RF transmission, the data must be manipulated several times. For example, let's assume you have a 20B message payload that needs to be transmitted from the meter to the collector. Initially, these 20B reside in SRAM. However, the data may include private customer information and, therefore, must be encrypted. Afterwards, a cyclic redundancy check (CRC) is computed and appended on the end of the encrypted message. Finally, the entire message will be encoded (e.g., Manchester, 3:6, etc.) before it is serially passed through the serial peripheral interface (SPI) to the radio transceiver. All of these functions can be performed in software using the CPU. However, it is much more efficient to have dedicated hardware, such as a dedicated packet processing engine (DPPE) as shown in figure 4, perform these tasks.

Figure 4: Processing time and power savings achieved with DPPE hardware block.

Using a DPPE not only reduces the time needed to perform the functions, but it also reduces the current consumption during that time since flash memory is not being accessed. The net result can be up to a 90 percent power reduction during active mode. With these improvements, we are able to exceed the savings target for active mode, making it only 6 percent of the overall budget (figure 5).

Figure 5: Smart meter power reduction results achieved using DPPE.

After applying all three of the power saving techniques, we were able to successfully raise the TX power budget to 70 percent through a complete subsidy of savings from RX, sleep, and active modes. In other words, we met the overall design objectives of increasing the TX reliability without using a larger battery or reducing the original target life.

This example demonstrates how power savings could be applied to redistribute the overall budget in a smart meter application. However, power savings can be valuable in a number of other ways. One obvious example is the ability to use a smaller, lower-cost battery. Another benefit may be to increase the battery's target life using the same battery. A less obvious benefit is greater design margin and reduced warranty liability. Consider a scenario in which a meter manufacturer produces millions of units per year, each with a 20-year service warranty. If meters begin to fail after 15 years because of excessive power consumption, the potential liability to the supplier can involve tens of millions of meters. Ultimately, additional design margin provides peace of mind for engineers and investors alike.

About the author
Keith Odland is Director of Marketing, Microcontrollers, at Silicon Labs.

To download the PDF version, click here.


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