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How to design wide-band buck regulator

Posted: 20 Feb 2012 ?? ?Print Version ?Bookmark and Share

Keywords:wide-band? buck regulator? FET switch?

In this article, we describe the steps to designing a wide-band buck regulator. It is a standard buck regulator, but with modifications that allow the output voltage to vary across a wider range. This allows it to accommodate electronic devices that also operate over a wide range.

A modified buck regulator which generates an output voltage in the wider voltage range of today's ICs will use less power. It does this by keeping its FET switch off more often (by keeping the feedback-voltage constant) while operating in this wide range, thus increasing its efficiency.

A standard buck regulator maintains regulation by measuring the output voltage and comparing it with an internal reference. When the divided-down output voltage drops below the internal reference of the regulator, a FET switch turns on more often (due to increased duty cycle of the drive to the gate) to increase current to the output capacitor, raising the output voltage.

Similarly, when the divided-down output voltage rises higher than the internal reference, the FET turn-on time decreases (due to decreased duty cycle of the gate drive) and the capacitor voltage is allowed to drop, based on current draw from the load.

By increasing the allowable range of the regulator output, the voltage output is allowed to drift based on load requirements, which reduces the duty cycle of the FET gate drive, much like a virtual zero power (VZP) controller (reference). This reduces the I2R losses of the FET and increases the efficiency.

Figure 1: Schematic of a wide-band regulator (2.48 V C 4.13 V). (Click on image to enlarge.)

The approach to designing such a regulator starts with identifying the range of the output voltage that is less than the limits of the operating range of the load. We refer to these limits as VH (for Voltage High) and VL (for Voltage Low).

These limits should be chosen to be slightly less than the actual limits of the load to account for some ripple at these extremes. Once the limits are chosen, the regulator feedback voltage is modified through a pathway that uses comparators to determine if the output voltage is greater than VH or less than VL (figure 1).

The figure shows a wide-band regulator with a range of operation between 2.48 V and 4.13 V, set by the -? gain of summing circuit (the "summer") around IC1, with a mid-range output of 3.3 V. The outputs of the comparators (IC2 and IC3, which are assumed to be rail-to-rail outputs) are summed relative to the internal reference voltage; in example of figure 1, this voltage is 1.25V).

The summer (IC1) generates a new feedback voltage for the regulator that is either equal to the reference voltage Vref (if operation is between VH and VL), 25% above the reference voltage (if operating above VH) or 25% below the reference voltage (if operating below VL). This will keep the regulator within the range of VH and VL (excluding some ripple), which keeps the duty cycle of the gate drive constant.

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