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32bit RISC Secure core based on Cortus APS3s CPU

Posted: 19 Apr 2012 ?? ?Print Version ?Bookmark and Share

Keywords:smart card? 32bit CPU? security architecture?

StarChip has announced development of a high-performance 32bit RISC Secure Core based on Cortus' APS3s CPU. According to the company, the ARX CPU confirms its commitment to smart card business by expanding its product portfolio to payment and ID markets.

To develop their Secure Core, StarChip selected the APS3s from Cortus. The APS3s is a full 32bit general purpose CPU specifically designed to meet the requirements of embedded systems. The APS family are modern RISC processors with Harvard architecture. They feature leading code density and high power efficiency yet also very high performance, noted the firm.

In addition to these technical features, StarChip and Cortus have signed an agreement allowing StarChip to augment the design of the APS3s to implement embedded security mechanisms. This is the starting point for StarChip to implement its innovative strategy GAIA: A new vision of self-healing security architecture on silicon. As a result, the StarChip Secure Core will embed all the necessary technology to counter both Side-Channel attacks and Fault Injection attacks making it ideal for applications requiring the highest levels of security, added the company.





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