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The golden age of simulation-driven design

Posted: 21 Sep 2012 ?? ?Print Version ?Bookmark and Share

Keywords:implementation process? integrated circuits? electronic design automation?

Temperature also has an inversely exponential relation to the maximum allowable current in a metal interconnect, and directly affects the mean time to failure of an IC. Accurate operating die temperature needs to be considered when performing electro-migration simulations for reliability. Making an assumption about die temperature can drastically determine the number of electro-migration violations one fixes or not. Sometimes, even a worst case temperature assumption may not be a true localized worst case. High current densities could lead to localized hot spots that are only a few square microns in area. Not capturing these localized temperature gradients and simulating the electro-migration effects may compromise the lifetime of a device.

A combined die-package thermal analysis needs to be performed before fixing the violations with the impact of temperature. Leading-edge reliability platforms have the ability to perform IC-package-system level thermal simulations, and back annotation of the spatial temperature at a micron resolution while performing EM and self-heat analysis. These platforms also have the ability to handle complex extraction and electro-migration rules for advanced process nodes.

Event-based reliability failures
Event-based reliability failures are typically catastrophic events that can render the IC inoperable after the event. An electrostatic discharge (ESD) on an IC is the most common form of event-based reliability failure during normal operation. The protection mechanism for an ESD failure is usually in the form of a low impedance discharge path for the ESD currents. Verification of these failures is complex, considering the number of voltage domains we have in today's ICs and the shrinking ESD margin due to technology scaling.

ESD design has quickly changed from an 'art form' to being 'simulation-based'. ESD designers no longer have to rely on manual checks, looking through the power / ground grid structure and auditing the connection to the ESD cells and bump pads. Simulation tools are smart enough to show the resistance bottlenecks during the ESD events and are powerful enough to perform millions of resistance calculations between zap points in a package-die subsystem.

A current density check during ESD events is also an important aspect that needs to be verified in today's designs. The ESD current and voltage standards have remained the same from one technology node to another. The same amount of charge needs to be shunted through a discharge path regardless of the technology node. The device not only needs the ability to discharge the current through the ESD clamps but also needs to reliably carry the current through the metal interconnects without burning out. Tools are smart enough to simulate the entire ESD event and check the current density on all die metal interconnects for failures.

The number of voltage domains in today's ICs has also risen sharply. The complexity involved in modeling cross domain ESD checks is also very high. Designers not only need to perform ERC checks for the presence of clamps or back-to-back diodes between these domains, but they also need to check the validity of placement by performing appropriate resistance calculations between all these domains.

The golden age
Low cost and time-to-market are critical to the success of OEM IC suppliers today. If a particular failure mechanism cannot be modeled and predicted in an IC, then the reliability of the system is compromised. IC designers no longer have the luxury of testing the die in a lab and figuring out reliability issues with such tight schedules. A simulation-driven product design, testing, and verification sign-off is imperative in this climate. With today's multiphysics technologies, creative thinkers, and innovative doers, we are one step closer to the golden age of simulation-driven product design.

About the author
Arvind Shanmugavel is Director of Applications Engineering at Apache Design Inc., a subsidiary of ANSYS, Inc., supporting RedHawk and Totem product platforms. Prior to Apache he worked at Sun Microsystems, leading design initiatives for advanced microprocessor designs. He holds a MSEE from the University of Cincinnati, Ohio.

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