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DRAM standards and DDR4 timing

Posted: 14 Feb 2013 ?? ?Print Version ?Bookmark and Share

Keywords:DRAM standard? JEDEC? DDR3? DDR4?

When it comes to memory, today's computing platforms and embedded applications demand more: more capacity, more speed, and more efficiency. In 2000, JEDEC published the DDR1 DRAM standard, which featured a then-speedy top data-transfer rate of 200 MT/s.

Fast-forward to September 2012, and the release of the hotly anticipated DDR4 DRAM standard (JESD79-4), which specifies a power-sipping DRAM with an initial transfer rate of up to 2.4 GT/s. Why bother to transfer over your design, you might ask, given that DDR3 devices operating at 2.1 GT/s are broadly available? The DDR4 operating voltage of 1.2 V, compared to 1.5 V for DDR3 is one good reason. Future scalability is anotherDDR4 is the first DRAM standard compatible with 3-D architectures, and it currently boasts an end-goal transfer rate of 3.2 GT/s.

Today's computing platforms and embedded applications have demanded a lot of things, such as higher capacity, faster speeds and tighter efficiency. In 2000, JEDEC published the DDR1 DRAM standard which featured a then-speedy top data-transfer rate of 200 MT/s.

It's not just the number that matters though, but the way the standard approaches high-speed operation that's important, says JEDEC board member Perry Keller, manager for the digital memory applications program at Agilent Technologies. He covered key aspects of DDR4 timing at the "Making DDR4 work for you" session at DesignCon 2013.

"We've got a broad population of folks who really haven't had the time or the business need to learn about DDR4," Keller says. "What we hope to do is familiarise them with DDR4: What it is, why it exists, what it can bring to their products, and how to do something practical with it." Indeed, DDR4 brings a host of benefits, including dramatically reduced power demand and compatibility with 3-D architectures. It also corrects a key weakness of earlier versions.


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