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Impact of the Cloud on FPGA design

Posted: 06 Mar 2013 ?? ?Print Version ?Bookmark and Share

Keywords:cloud computing? FPGA? Place-and-Route?

Initially, this design did not meet timing. Reading the compilation reports for the initial build, I got some insight into the critical paths, the congested regions, and the modules where the placer seemed to be spending the most time. Then I started to come up with a list of changes that I think might help close timing. Due to the fact that cloud resources were available, my space for exploring possible solutions in a shorter amount of time became greater than before. I was able to tweak design constraints and tool settings (synthesis, P&R) to come up with 30 different builds, and then run them in parallel. Plotting the results, I quickly found out which builds came closer to meeting timing 每 and which strayed further off the path. Somewhat akin to a search process, from the figure above I was able to narrow my search space to builds, "qse_18" and "qse_19."

Out of the 30 builds, "qse_18" and "qse_19" produced setup and hold times that were closest to meeting timing (smallest negative slack values). I then analysed these in greater detail to decide which changes in the constraints and the RTL were necessary. While considering the next round of changes, I was also able to compare results from the original set of 30 builds to get a sense of which seemed detrimental to the overall timing.

Overall, instead of spending a few days or weeks running tens of builds, one after the other, I was able to analyse more possibilities and make the next design decision in a matter of hours. This approach suggests a design methodology change 每 no longer is a design engineer restricted to running one, two, or three builds at a time, waiting for a narrow range of results before deciding next steps. With a planned cloud-based approach, design teams can explore 10, 20, and even hundreds of builds in advance, run them in parallel and have a lot more data on hand to make the required analysis and subsequent changes. Questions about what modifications can be made to get to design closure can potentially be made in days rather than in months. In addition, there is more room to explore optimisations like:

???Will performance improve if we try this?
???Can power consumption be further reduced if we do that?

However, this sudden freedom to run multiple builds in parallel should be considered a productivity aid rather than a substitute for good engineering practices. For example, while it may be tempting to simply "brute-force" all possible variations of constraints or tool options once there is a timing problem, too much resulting data can complicate analysis and even mislead the designer (not to mention, shock your project manager with a huge cloud usage bill). Without first spending time to debug a design, an engineer will find it very hard to progress in knowledge and experience.

Inevitably, as users of cloud computing, we will probably all arrive at the security question. A senior colleague remarked that there seems to be a disconnect between the use of cloud computing in the consumer space versus that in an industrial setting, in the sense that when a designer or project manager imagines confidential IP leaking out from a company, he or she might actually be thinking about something like online credit card scams. Personally, I think uploading design files to our semiconductor foundries is similar 每 we trust the recipient and we transmit only what is necessary. In the case of FPGA design, I might start using the cloud by sending netlists and not RTL, or by uploading older designs that are less important. Or perhaps use a company's internal cloud 每 although that presents the problems of limited scale and elasticity again.

In summary, besides increasing application in the consumer and enterprise space, a cloud-based approach can help an FPGA design engineer in certain tasks like synthesis and P&R. Beyond speeding up individual parts of the design process, such an approach can greatly accelerate the overall FPGA design workflow by abstracting multiple, parallel builds as a group of builds to examine. As a result, the potential shortening of the design cycle and, consequently, the product's time-to-market, is a benefit that arguably far exceeds that of potential IT savings. From the project manager's point of view, imagine what a headstart of even one or two weeks can do for one's product.

However, as they say, with great power comes great responsibility. Cloud computing in FPGA design may represent more of a methodology change than a quick IT fix. Analysis tools, engineering practices and even business models must evolve accordingly in order to manage this methodology and take full advantage of its potential benefits. Done properly, this is an application of existing technology that can greatly speed up a design engineer's daily work.

About the author
Harnhua Ng is one of the founders of Plunify, which provides customisation, automation, and management capabilities on a secure, scalable, on-demand cloud computing platform preloaded with chip design software tools.

To download the PDF version of this article, click here.


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