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How to minimise power use in supercapacitor stacks

Posted: 19 Oct 2015 ?? ?Print Version ?Bookmark and Share

Keywords:supercapacitor? over-voltage? MOSFET? current balancing? battery?

As the use of two or more supercapacitor cells becomes prevalent in the design of a variety of battery operated systems, designers are looking for ways to optimise the circuitry around the cells configured in a series. Designs with greater power efficiency are high in demand because one of the goals is to extend battery life by reducing energy consumption.

One essential fact of using two or more supercapacitor cells in a series is that each cell has to be referenced against the others in order to achieve balanced voltages and prevent over-voltage of any one of the cells. Over-voltage causes stress and eventual failure of the supercapacitors.

There are two widely used methods of active cell balancing: One method uses an operational amplifier circuit to balance voltage in each cell, by essentially forcing a mid-point voltage between the supercapacitor cells. The other method uses a MOSFET array to balance the leakage currents in each cell by exponentially varying currents relative to selected operating voltages. This method compensates for leakage current imbalances with small voltage imbalances so that the maximum rated voltage limits are not exceeded.

For applications that depend on the lowest power dissipation to preserve battery life, the current balancing method provides superior energy efficiency for the supercapacitors, batteries and systems. Additionally, far fewer circuit components are required, board space is reduced, and the end result is lower cost and greater reliability.

Below, a graph demonstrates how power dissipation of a supercapacitor series-connected stack differs in each method. The figure charts cell leakage current (?A) versus cell voltage. It offers a comparison of individual cell leakage current both with op-amp-based voltage balancing and MOSFET-based current balancing.

Figure: The graph shows the difference between op-amp-based voltage balancing versus MOSFET-based current balancing for two supercapacitor cells used in a series. Note that IC1 and Cell1 is a near vertical line that shows the ALD910023 SAB MOSFET used for the current balancing, which forces Cell 1 to increase its total leakage current exponentially with incremental voltages.

The contrast between the two different methods of supercapacitor cell balancing is best illustrated with an example. In this example, the first assumption is that the total charge voltage (power supply) across two cells shown in the figure is 4.6V.

The second assumption is that the cell capacitances of the supercapacitors are equal, thus C1 = C2.

Thirdly, the cells are balanced when cell leakage currents are equal, where IC1 = IC2.

Fourth, the individual Cell 1 and Cell 2 leakage current each follows its own specific current-versus-cell- voltage relationship. This is the result of the individual characteristics of each supercapacitor cell, which cannot be controlled and which can vary over a wide range of values and shapes. This is true even for supercapacitors made with the same material by the same manufacturer.

Most supercapacitor manufacturers only specify a maximum leakage current value, with some effort to "match" but not "guarantee" leakage currents, by housing two or more supercapacitors within a single package.

Without any external intervention or external cell balancing, natural cell balancing occurs where both cells have leakage currents at 1.1?A, where Cell 2 settles to 1.7V and Cell 1 settles to 2.9V (see dotted lines). Cell 1, having exceeded its rated voltage of 2.7V, deteriorates rapidly and becomes damaged prematurely.

When op amp-based voltage balancing is applied, Cell1 (C1) is forced to a mid-point voltage of 2.3V at 0.8?A. Cell 2 (C2) is also forced to 2.3V at 2.8?A leakage current plus 1?A for op amp current, which equals 3.8?A for total power dissipation. The vertical line on the left in the graph above shows op- amp voltage balancing.

The solid horizontal line in the figure demonstrates MOSFET-based current balancing. Using the ALD910023 device, Cell 2 balances at 2.27V at 2.6?A and Cell 1 balances at 2.33V at 2.6?A.

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