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Mixed-signal IC design: Forecasts for 2016

Posted: 08 Jan 2016 ?? ?Print Version ?Bookmark and Share

Keywords:IC design? IoT? automotive? Moore's Law? MCU?

Lowering power of IoT designs

IoT designs encompass a broad array of end devices, all requiring connectivity. Power consumption is an extremely critical element in field sensors and wearable devices. To meet the stringent low-power requirements, many engineers are turning to techniques such as ultra-low power design, via sub-threshold CMOS design, and the integration of elaborate power-management control systems. These techniques require better characterisation of devices at low voltage levels, with special attention paid to process variations and leakage power. Foundries are developing processes specifically targeting ultra-low power designs.

Energy harvesting also presents a promising future option. The photovoltaic method is the most common method. Energy harvesting from radio or sound waves remains in the research phase. Currently, the amount of power being harvested from those new methods is fairly low and may not be sufficient for ultra-low power designs.

Like automotive, IoT designs, too, are driven by large volumes of data that need to be aggregated and analysed. In IoT gateways and cloud servers, performance and connectivity features are critical to success. Advanced-node processes are a playing an important role in providing sufficient computing power. Foundries are continually driving towards sub-10nm process nodes. However, advanced-node processes can only push things so far. Many engineering teams are also tapping into 2.5D and 3D technologies to combine chips with different technologies through advanced packaging. This not only extends Moore's Law, but also can take advantage of multiple process nodes to optimise device performance.

All of these methods and technologies lead to more complex verification of chip, package and board, and a need for better analysis tools to ensure signal integrity and power integrity, model thermal effects and more. It's also more important to look at a design holistically, to be able to simulate the chip with the package and the board as an entire system.

Holistic approach to chip design

A holistic approach to chip design, taking into account chip, package and board, can support a more comprehensive verification process.

Improving mixed-signal verification productivity

Typically, mixed-signal methodologies have entailed a long journey. For example, consider a sensor company whose designs may initially have very few digital components. As these designs grow more complex, the design team must handle an increase in digital content. Treating the digital content the same as the analogue is not only costly, but also doesn't yield the best results. As a result, the engineers must learn new methodologies and adapt their skill sets.

On the tools side, this shift involves merging analogue and digital methodologies to support design of high-quality chips. While there isn't a one-size-fits-all flow that works with all mixed-signal designs, there are some essential points to consider. First off, front-end verification starts with simulation, when you can co-simulate both the analogue and digital sides together. Speed is an important goal here, but also presents a challenge. On the analogue side, a SPICE solver is traditionally used, but it is slow for the digital side. On the digital side, verification generally consists of functional verification of the whole chip. However, with mixed-signal designs, engineers are often forced to plug a SPICE engine into the functional verification process, slowing everything down. You need to have regressions and to be able to run thousands of simulations every night, but the SPICE solver doesn't support the speed required to get through such a volume of simulations.

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