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Measuring PAM4 symbol levels

Posted: 06 May 2016 ?? ?Print Version ?Bookmark and Share

Keywords:duty-cycle distortion? crosstalk? electromagnetic interference? electromagnetic interference? ISI?

IEEE and OIF-CEI each offer different techniques for measuring PAM4 symbol levels. While they both measure the voltage levels of electrical PAM4 signals and are strongly correlated, they're not the same.

We should expect that as technologies mature, some techniques will fall out of favour and others will move in. In this case, one of the techniques strikes me as nostalgic. There's nothing wrong with using an obvious technique, but I prefer measurements that can be related to system performance, which for PAM4 is either the SER (symbol error ratio) or BER (bit error ratio).

The first technique, from IEEE's 100 GbE 802.3bj (as well rumours from people who have seen the latest draft of the emerging 400 GbE specs) uses the transmitter linearity test pattern (figure 1).

Figure 1: Transmitter linearity test pattern, which could be used for testing 400 GbE. (Graphic, Copyright Ransom's Notes, used with permission).

The test pattern consists of clearly defined symbols: 16 consecutive level A (or level 0) symbols followed by 16 consecutive level B (or 1), and so on as shown in the graphic. The levels are measured after the signals have settled, whether or not de-emphasis is employed, 7 UI (unit intervals) after the transition. The levels {VA, VB, VC, VD} are given by the average value of the voltages over the centre 2 UI of each 16 UI symbols.

The effective symbol separations are given by:

Where the average voltage is given by the average of the four symbol voltage measurements, ?(VA + VB + VC + VD). The ideal symbol separations are ES1 = ES2 = 1/3.

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