Job Description
Digital and mixed-signal design verification engineer for mixed-signal ICs with integrated ARM Cortex-Mx microcontroller. The candidate needs to have experience in SOC verification and integration of verification IP (VIP). The candidate should have knowledge of assertion-based verification and constrained random test generation. Understanding of OOA/OOD would be a plus. Candidate of formal verification experience is another plus.
- Strong expertise in SystemVerilog and UVM
- Knowledge of SV assertion and assertion-based verification
- Understand SOC and mixed-signal IC verification methodology
- Experience in DSP algorithm verification
- Strong programming skills and OO concepts
- Strong verbal and written communication