In this position, you will be a member of the Hard IP design team developing next generation IP in deep submicron process for the microprocessors and System-On-Chip (SOC) ICs, and will be performing tasks related to VLSI CMOS IC circuit design. Such tasks may include: VLSI CMOS Circuit design of high speed or high voltage IO (USB2, MIPI, eMMC, GPIO, SERDES). You will be performing timing, functional, reliability analysis and product testing.

BSc and MSc in Electronics/Computer Engineering with at least 7 years' relevant experience, PhD fresh graduate with relevant research experience is encouraged to apply. The candidate should have strong analytical skills, be able to work independently and work at various levels of abstraction. Any relevant amount of experience in mixed signal circuit design would be an added advantage, including:
-Strong background in high speed serial interfaces, like PCIe2, USB2, MIPI, Serdes, HDMI.
-High voltage interface in sub-micron process, like DDR, GPIO and HDMI.
-Experience with Very Large Scale Integration (VLSI) circuit layout.
-Experience with UNIX operating environment, Cadence design tools, Perl script, and Ocean script.