Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > EDA/IP

Requirements for next-generation PLD tools

Posted: 01 Mar 1999 ?? ?Print Version ?Bookmark and Share

Keywords:million gate? pld? programmable logic design? fpga? reuse?

This paper describes ways on how to design a multi-million gate PLD using next-generation tools.

View the PDF document for more information.

Article Comments - Requirements for next-generation PLD...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top