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Upgrade to high rate physical layer by IEEE802.11

Posted: 29 Jun 1999 ?? ?Print Version ?Bookmark and Share

Keywords:ieee802.11? cck? ds? direct sequence? frequency hop?


51IIC-Taipei ? Conference Proceedings Achieving Ethernet Rates in Wireless LANs Carl Andren Senior Principal Engineer Harris Corporation Introduction Just shortly after the IEEE 802.11 standards board approved a 1 and 2Mbps standard for wireless local area networks (WLANs) in 1997, a working group started working on a higher rate ex- tension to the physical layer of the standard with the intention of delivering Ethernet like speeds over existing 802.11 WLAN systems. This effort was directed at the 2.4 GHz ISM band which is available almost worldwide and offers 83.5 MHz of spectrum into which up to 3 channels can be implemented (Foil 2). After months of evaluating various modulation proposals such as M-ary Orthogonal Keying (MOK), Pulse Position Modu- lation (PPM), Orthogonal Frequency Division Multiplex (OFDM), Packet Binary Convolutional Coding, and Orthogo- nal Code Division Multiplex (OCDM), the working group could not come to consensus on a single modulation method (Foil 3). Harris Semiconductor and Lucent Technologies then joined forces and developed a compromise approach based on Comple- mentary Code Keying (CCK). In July 1998 the 802.11 work- ing group adopted CCK as the basis for the high rate physical layer extension to deliver data rates of 11Mbps. This higher rate extension was adopted because it easily provides a path for interoperability with the existing 1 and 2Mbps networks by maintaining the same bandwidth and incorporating at same pre- amble and header, which already has a rate shift mechanism. IEEE 802.11 is not the only group attempting to set standards for wireless LANs. There are other standards efforts like: Bluetooth, Home RF Working Group and Personal Area Net- works that seek to define WLANs for various activities, but 802.11 is the only thrust addressing high data rates for building wide networks (Foil 4). Complementary code keying CCKisavariationofM-aryOrthogonalKeyingmodulationwhich usesanI/Qdemodulationarchitecturewithcomplexsymbolstruc- tures. CCK allows for multi-channel operation in the 2.4GHz ISM band by virtue of using the existing 802.11 1 and 2Mbps direct sequence spread spectrum (DSSS) channelization scheme. Thespreadingemploysthesamechippingrateandspectrumshape as the 802.11 Barker word spread functions allowing for three (3) non-interfering channels in the 2.4 to 2.483 GHz ISM band. CCK is an M-ary Orthogonal Keying modulation where one of M unique (nearly orthogonal) signal codewords is chosen for transmission (foil 5). The spread function for CCK is cho- sen from a set of M nearly orthogonal vectors by the data word. CCK uses one vector from a set of 64 complex (QPSK) vectors for the symbol and thereby modulates 6-bits (one-of-64) on each 8 chip spreading code symbol. Two (2) bits are sent by QPSK modulating the whole code symbol and this modulates allows for 8-bits onto each symbol. The formula that defines the CCK codewords is shown in Foil 6. In it, there are 4 phase terms. One of them modulates all of the chips and this is used for the QPSK rotation of the whole code vector. The others modulate every odd chip, every odd pair of chips and every odd quad of chips respectively. Walsh functions were used for the M-ary Bi-Orthogonal key- ing (MBOK) modulation first proposed by Harris. They are the most well known orthogonal BPSK vector set and available in 8 chip (powers of 2) vectors. To transmit enough bits per symbol, the MBOK modulation was used independently on the I and Q channels of the waveform effectively doubling the data rate. CCK on-the-other-hand uses a complex set of Walsh/ Hadamard functions known as Complementary Codes. Walsh/ Hadamard properties are similar toWalsh functions but are com- plex, that is, more than two phase, while still being nearly or- thogonal. With complex code symbols, we cannot transmit si- multaneous independent code symbols. Since the set of comple- mentary codes is more extensive, however, we have a larger set of nearly orthogonal codes to pick from and can get the same number of bits transmitted per symbol. Additionally, the multipath performance of CCK is better than MBOK due to the lack of cross rail interference as will be explained later. For MBOK, there are 8 BPSK chips that have a maximum vector space of 256 code words of which you can find sets of 8 that are orthogonal. Two independent BPSK vector sets are se- lected for the orthogonal I and Q channels which modulate 3- bits on each. Two additional bits are used to BPSK modulate each of the spreading code vectors. For CCK, there are 65536 possible code words, and sets of 64 that are nearly orthogonal. This is because it really takes 16 bits to define each code vector (Foil 5). To get the 5.5 Mbps data rate, a subset of 4 of the 64 vectors that have superior coding distance is used. One of the advantages of CCK over MBOK is that it suffers less from multipath distortion in the form of cross coupling of I and Q channel information. The information in CCK is en- coded directly onto complex chips which cannot be cross-couple corrupted by multipath since each channel finger has an Aej distortion. A single channel path gain-scales and phase-rotates the signal. A gain scale and phase rotation of a complex chip still maintains I/Q orthogonality. This superior encoding tech- nique avoids the MBOK, corruption resulting from encoding Mark Webster Staff Engineer Harris Corporation 52 IIC-Taipei ? Conference Proceedings half the information on the I-channel and the other half on the Q-channel, which easily cross-couple corrupts with the multipath's Aej phase rotation. In an overview (Foil 7) of the CCK modulation modes and the original 1 and 2 Mbps modes which are used in the Harris HFA3860B chip. For 1 Mbps, the signal is modulated BPSK by one bit per symbol and then spread by BPSK modulating with the 11 Mchip/s Barker code. For 2 Mbps, the signal is QPSK modulated by two bits per symbol and then BPSK spread as before. For the 5.5 Mbps CCK mode, the incoming data is grouped into 4 bit nibbles where 2 of those bits select the spread- ing function out of the set of 4 while the remaining 2 bits QPSK modulate the symbol. The spreading sequence then DQPSK modulates the carrier by driving the I and Q modulators. To make 11 Mbps CCK modulation, the input data is grouped into 2 bits and 6 bits. The 6 bits are used to select one of 64 com- plex vectors of 8 chip length for the symbol and the other 2 bits DQPSK modulate the entire symbol. 802.11 interoperability Interoperability was a priority amongst the 802.11 working group in the selection of the waveform for higher rates. In par- ticular, the signal acquisition scheme for 802.11 uses a specific preamble and header using the 1 Mbps modulation and has provision built-in for sending the payload at higher rates. The packet frame structure and protocol of 802.11 much like 802.3 Ethernet, however it must operate wirelessly in a harsh RF environment. This means that the signal levels may become corrupted and subject to multipath. Signal acquisition and syn- chronization of the preamble and header are critical. The preamble and header consists of five (5) fields. They are: Preamble, SFD, Signal (rate), Service, Length and CRC. The header takes 48 bits, and the total length of the acquisition sequence is 192 microseconds. The preamble and header is modulated using the 1 Mbps modulation rate and is scrambled with a self synchronizing scrambler. The high rate scheme will initially use this acquisition sequence which already has a rate field that can be programmed for 1, 2, 5.5 or 11 Mbps. The high rate 802.11 standard is being written with an optional shorter acquisition sequence for lower packet over- head (Foil 8). The 802.11 packet transmission protocol is Carrier Sense Multiple Access with Collision Avoidance (CSMA/CA). This differs from "wired" Ethernet which uses collision detection. Radios can't detect collisions, therefore they use collision avoid- ance using a listen before talk and random back off deferral mechanisms. Since all stations use the same acquisition se- quence at the lowest basic rate, all stations can see the traffic and process the signals at the appropriate rate. If legacy 1 and 2Mbps stations receive the packet header, but are not capable of processing the higher rate, they can still defer the medium based on knowing that an 802.11 signal has been sensed and knowing the length of time it is on the air. To insure that the modulation has the same bandwidth as the existing 802.11 DS modulation, the chipping rate is kept at 11 Mchip/s while the symbol rate is increased to 1.375 MSps. This accounts for the shorter symbols and makes the overall bit rate 11 Mbps. This approach makes system interoperability with the 802.11 preamble and header much easier. The spread rate remains constant and only the data rate changes and the spectrum of the CCK waveform is same as the legacy 802.11 waveform. Walsh and complementary codes Walsh functions have a regular structure and at least one mem- ber that has a substantial DC bias. In this case it is the first row with all 1s. All the rest are half 1s and half 0s. The DC bias can be reduced on the worst member of the set by multiplying all members with a cover code. This, however introduces a smaller DC bias in half of the members of the set. The main problem of MBOK is caused by the fact that it uses independent codes on the in-phase and quadrature signals, which creates a significant amount of cross-rail interference in the pres- ence of multipath. To avoid this, one would ideally transmit only symbols for which processing could be done on I and Q simultaneously, and use code words that all have good autocorrelation properties, such that there is minimal inter-sym- bol and inter-chip interference. Such codes actually exist in the form of the complementary codes. For a code length of 8 chips, 256 possible sequences c can be constructed as follows, using 4 QPSK phases 1 to 4. Complementary Codes Note that 1 is present in all 8 chips, so it simply rotates the entire code word. Hence, to decode these code set, one would need 64 correlators plus an additional phase estimation of the code that gave the largest correlation output. The correlation can be significantly simplified by using techniques like the fast Walsh transform (analogous to an FFT butterfly circuit). In fact, when the 4 input phases 1 to 4 are binary, then the complementary code set reduces to a modified Walsh code set, similar to the one used in Harris' original proposal. CCK codes have a number of advantages. They are: 1)They are nearly orthogonal, yielding superior error-rate performance. 2) Using a cover code eliminates one bad DC bias member, without destroying orthogonality. Implementation Harris HFA3860B implements the legacy 802.11 1 and 2Mbps DSSS demodulation, MBOK, and the CCK waveform at 11Mbps as adopted by the 802.11 working group This chip is part of the overall PRISM chip set as shown in foil 9. The processing of the waveform is carried out in the Baseband Pro- cessor (Foil 10). The Barker coded signals such as the pre- amble are correlated in two time invariant matched filter correlators. This allows rapid acquisition of the preamble and is also used for demodulation of the BPSK and QPSK modu- lated 1 and 2 Mbps signals. The demodulator converts the correlator outputs from the Cartesian coordinate system to the polar coordinate system. All demodulation processes are there- fore non complex. For the high rate modes, the signal is de- rotated by a complex multipliery and then correlated with a Fast Walsh Transform block (FWT). This is followed by a big- gest picker and DQPSK demodulator. Carrier tracking in these modes used decision directed phase detection and a lead-lag filter in the tracking loop. Fast transform structure The four phase variables each take on values of [0, /2, , 3/ 2], and there are 256 (4*64) possible 8 chip codes. These codes have an inherent "Walsh" type structure that allow a simple 53IIC-Taipei ? Conference Proceedings butterfly implementation of the decoder (Foils 11 and 12). Al- though it is possible to squeeze a few more complementary codes out of this 8 chip set, the rest of the codes cannot be decoded with the modified fast Walsh transform. Foil 11 shows the ba- sic fast Walsh block which brings in 8 chips of soft decision data shown here by x0, x1, x 7, and produces 16 possible corre- lation for given values 1 and 2. Foil12showsall256possiblecorrelatoroutputs. TheBFWB's are shown in detail in Foil 11 There are 28 butterflies needed for a length 8 transform. Each butterfly requires 4 additions (the phase rotationsaretrivialfor4-PSK),sothetotalnumberofoperationsis 112complexadditions.Thedirectcalculationmethodwith64sepa- rate correlators requires 512 complex additions, so the fast trans- form reduces the complexity by almost a factor of 5. CCK is inherently a quadrature MOK signal. For the full data rate potential, we QPSK modulate the starting phase of the symbols to get 11 Mbps as shown in Foil 6. To reduce the data rate for a more robust lower data rate, we can trim the signal set to one that has the greatest distance properties with a reduced number of vectors. For 5.5 Mbps, there are two options -- first, trim the 64-ary set to 8-ary and BPSK modulate the sym- bols or second, trim the set to 4-ary and QPSK modulate the symbols. Either scheme achieves 4 bits per symbol but simula- tions conclude that the latter is more robust in multipath. Range performance The CCK modulation achieves excellent range due to the fact that MOK has better Eb/N0 performance than BPSK. This per- formance is due the embedded coding properties of the spread- ing modulation. The modulation basically ties several bits to- gether so that the receiver makes a symbol decision. If a sym- bol is in error then all of the bits in that symbol are suspect, but not all will necessarily be in error. Thus, the symbol error rate and the bit error rates are related. While the SNR required to make a symbol decision correctly is higher than required to make a one bit decision, it is not as high as required to make all of the bit decisions of a symbol independently and correctly. Thus, some coding gain is embedded in the basic spreading waveform. Simulations conclude CCK modulation yields achievable ranges of 100' reliably and that the high rates are more susceptible to multipath than the lower rates as would be expected from the higher required Es/N0. Performance parameters The FCC requires that DSSS modulations used in the 2.4 GHz ISM band have a minimum processing gain of 10 dB. The spreading/despreading operations using CKK does provide 11 dB of processing gain when used in accordance with the FCC rules. The reduction in bandwidth provides 9 dB and MOK coding constitutes 2 dB of coding gain. After de-spreading, the SNR improves by 11 dB over the SNR in the spread bandwidth. Under these conditions radios designed with CCK modulation satisfies the FCC's requirements with ample margin for the CW jamming test. Antenna diversity helps insure a reliable 11 Mbps link for indoor environments. Any high rate modulation is more sus- ceptible to multipath interference and filter distortion than lower rate modulations due to the higher required SNR (Es/N0). Ex- tensive testing concluded that CCK modulation in the indoor environment and have shown acceptable performance. How- ever using antenna diversity yields significant improvement in the packet error rate. For high multipath environments, such as factory and manu- facturing plants, a CCK demodulator using a RAKE receiver can tolerate delay spreads of 100nsec and >100nsec when com- bined with a decision feedback equalizer (DFE). Multipath Stressed links can be substantially improved by equalization where substantial multipath is encountered. The typical envi- ronment for wireless LANs is the office or home. There, the delay spread is on the order of 100 ns or less as shown in Foil 13. Usually, the presence of walls in the direct path makes the system work from indirect paths and that makes the impulse response have energy leading the peak of the energy. This is called precursor energy and requires more complex processing that does the trailing energy from delayed echoes. Typically, precursor processing involves complex multiplies whereas, trail- ing energy involves adds and subtracts. Large warehouses and factories (Foil 14) often have much larger delay spreads and this takes more equalization process- ing. There is a range of complexities in the receive processing that can be employed to meet each of these environments. While it is desirable to make one chip that can handle all cases, it is often impossible to meet cost and power goals if too much ca- pability is taken on. RAKE receiver The RAKE receiver principle is good for modest multipath of around 100 ns delay spread. Foil 15 shows how the RAKE receiver is implemented in the PRISM chip under development. The classical RAKE receiver has multiple correlators with a delay and combine circuit following the correlators. For the CCK waveform, this would result in an unduly com- plex design as the CCK scheme requires multiple correlators for each of the multiple correlators of the RAKE technique. By transformation, the RAKE combiner can be moved to the input of the correlator bank where it is much simpler. In this form, it is called a Channel Matched Filter, and it complements the chan- nel impulse response and therefore corrects for it. This removes the channel effects as far as can be done with a fixed filter, but does not correct for inter symbol or inter chip interference (ISI/ ICI). Simulations have shown that the RAKE only receiver can achieve near 100 ns delay spread performance without an equal- izer. RAKE plus ISI receiver For the larger delay spreads of the factory environment, an ISI/ ICI equalizer is needed and that raises the complexity in sev- eral ways. First, the equalizer requires lots of gates running very fast in the receiver, and second it needs decision feedback to properly handle the ISI and ICI. The first stage of equalization is ISI cancellation and that involves taking the output of the symbol decisions and then subtracting the left over energy from the previous symbol from the current symbol before demodulation the current one. As shown in Foil 16, the past decisions are weighted with the chan- nel impulse response and subtracted from the input signal to the CMF. RAKE plus ISI/ICI receiver The next step in equalization is canceling the ICI interference and that takes a more complex process since the ICI depends on which of the 64 vectors was received. The Harris technique embeds the ICI equalizer into the FWT correlator block since the correction does not need to be performed on the fly, but can be set up prior to reception once the CIR is known. The full receiver with RAKE and ISI/ICI equalizer is shown in Foil 17. It has performance in multipath out to 333 ns for the most de- manding applications. 54 IIC-Taipei ? Conference Proceedings Equalizer performance The performance of each of the options shown above has been simulated (Foil 18) and shows that the receiver can be tailored in complexity for meeting all the various environments that a WLAN is likely to encounter. Future developments Harris has embarked on the design of new chip sets to reduce the cost of WLANS while increasing their capability. The PRISM 98 suite is designed with greater levels if integration while also adding the RAKE and equalizer functions in a staged development. (foils 19 to 21). Authors' contact details Carl Andren and Mark Webster Harris Semiconductor 2401 Palm Bay Road, N.E. MS:62A-024 Palm Bay, Florida Tel: 407-724-7535 email:

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