Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Processors/DSPs

The future of mixed-signal design

Posted: 01 Feb 2000 ?? ?Print Version ?Bookmark and Share

Keywords:mixed signal? soc? broadcom? lucent? cirrus?

The ability to harness DSP to execute analog functions in digital CMOS represents the future of mixed-signal design.

I hear two contradictory things regarding mixed-signal IC design. One set of voices says the systems-on-chip (SoC) of the future will be large mixed-signal systems, and the proportion of these being built will double from about 33 percent currently to 66 percent by 2005. The other set of voices says everything will be big digital chips constructed in ever-deeper submicron CMOS, in that the ASICs of the future will use as many 15 million logic gates, but that the analog and mixed-signal circuitry will be left off-chip.

My own view is that people are confusing "mixed-signal" design with "mixed-technology" design. In both cases, we are mixing analog and digital circuit elements. With mixed-signal design, however, we are minimizing analog concerns?essentially performing analog functions with digital circuitry. With mixed-technology design, however, analog concerns?particularly power?plays a much larger role.

I'll offer an over-simplified example to explain this. In traditional analog realms, you are controlling voltages and currents. With power management devices?switching regulators or low-dropout (LDO) linear regulators?you want to keep the voltage level constant as the current requirements vary. Even with simple amplifiers and signal conditioners, you want to elevate the voltage level of a sensor signal high enough to drive the input of an ADC (or some kind of meter, if you're working exclusively in analog). In traditional digital realms, you are counting ones and zeros (in the case of a microprocessor, many millions of them each second). Ideally, you want to take the data and instructions (themselves comprised of ones and zeros), perform some sort of combinatorial or mathematical operation on them, and shift the results of the previous operation to some cache or memory location with each tick of a 100-, 200- or 400MHz clock. From my point of view: you can manipulate voltages and currents?or you can count massive amounts of ones and zeros?but not both from the same chip. It's just not practical.

In this sense, the proponents of big digital ASICs are right: Mixed-signal design does not make any sense. It is far easier and less costly to mount an SOT23-packaged amplifier or line driver on a circuit board next to a big BGA-packaged digital ASIC than to spend years trying to figure out how to put that driver on the digital chip. Accomplishing this invariably involves implanting a bipolar transistor (or a power MOSFET) onto a CMOS substrate?what I call "mixed technology." While there are manufacturers proficient at BiCMOS manufacturing?Texas Instruments, Lucent Technologies Microelectronics Group, and even those like IBM Microelectronics tweaking the process with silicon germanium (SiGe) transistors for RF applications?mixed-technology ICs are often more costly to produce than separate devices employing CMOS and bipolar transistors. Certainly, this is true for RF transceivers employing bipolar or CMOS phase-locked loops, voltage-controlled oscillators, and frequency synthesizers along with separate gallium arsenide (GaAs) antenna drivers.

There are manufacturers like STMicroelectronics whose BCD process puts power MOSFETs on the same chip with bipolar driver transistors and CMOS logic. This process has been used successfully to build motor drivers and head positioners for hard disk drives (HDDs), for example. But a manufacturing process like this always poses problems, and typically demands applications (like miniature HDDs) where space considerations loom larger than cost constraints.

Thus, mixed-technology design will continue to be partitioned in separate devices, and demand separate areas of competence?analog and digital?as well as separate manufacturing processes. Despite aspirations on integrated Internet Appliance (IA) chips, National Semiconductor remains an icon for specialized analog expertise, along with standard linear component suppliers like Linear Technology and Maxim Integrated Products.

Will the real mixed-signal please stand up?

This doesn't mean the projections for so-called mixed-signal ICs are wrong. Their volumes will still be substantial, especially in communications and multimedia applications. But Asian users and designers should note: What is meant by "mixed-signal" here is not mixed analog-digital ICs. Rather, these are devices in which analog functions are performed with digital circuitry.

Though fabricated in widely available 0.25?m or 0.18?m CMOS processes?often by high-volume fabs like TSMC and UMC in Taiwan and Chartered Semiconductor in Singapore?the design of these circuits requires specialized expertise. In communications and multimedia applications, signals are processed digitally. Rather than the manipulation of voltages and currents, designers here must be able to control the noise?hissing, clicking and ticking from millions of CMOS switches?that will creep into low-level signals. Designers here need to master digital filter techniques?in other words, DSP.

Two companies come immediately to mind for specialized mixed-signal design. Broadcom Corp. will get market share for its ability to incorporate analog and digital signal processing expertise in CMOS communications circuits. Cirrus Logic, especially its Crystal Products Division, deserves attention for the multimedia circuits they've constructed in CMOS. The DSP expertise here is embedded next to high-speed, high-resolution data converters.

Examining the operation of new-generation communications circuits?audio processors or hard disk drive read channels?would demonstrate the expertise required. How, for example, do you launch Gigabit Ethernet signals over unshielded twisted pair (UTP) copper wires? The year-old Gigabit Ethernet over copper spec uses eight wires (four pairs) operating full duplex?four send, four receive?concurrently. With specialized encoding, a 1,000Mbps signal is transmitted by sending 250Mbps on each of four channels. Since those channels are clocked at 125MHz, the UTP cabling literally acts as an antenna. With four twisted pairs, each 125MHz signal would be radiated into the adjacent wires. It would be an electronic miracle to just to get an undissipated signal from one end of the cable to the other. The mixed-signal design would be not only be able to reconstruct the transmitted signal from each pair, but also to filter out near- and far-end reflections?as well as the radiated noise from adjacent wires.

Thus, a company like Broadcom harnesses a considerable amount of DSP expertise to control the noise produced by a Gigabit Ethernet PHY. A similar expertise is utilized by Lucent Technologies in the construction of its 24-channel 10/100-Ethernet PHY, since similar noise-canceling expertise is required to run 24 100Mbps channels off a single IC.

Cirrus Logic's expertise in digital audio has been well documented, but it may make sense review the kind of original thinking required to formulate traditional analog functions in digital CMOS. The exclusively analog means of converting a digital audio data stream to an analog signal is to latch it byte-by-byte across a resistor ladder whose values represent the ratio between the most-significant-bit (MSB) and the least-significant-bit (LSB) in the data word. This will take only a small number of transistors (as little as 32), but the thin-film resistor ladder must be laser-trimmed to very high accuracy. For a 16-bit dynamic range (approximately 96dB), the LSB must be 1/65,535th (1/216) of the MSB. This kind of trimming is expensive to manufacture (too expensive for consumer audio), and the accuracy of this kind of part is almost impossible to maintain once the device leaves the factory.

The sigma-delta conversion technique perfected by Cirrus' Crystal Division (and used by practically every other audio DAC manufacturer) utilizes a DSP technique called "noise shaping." It examines the digital audio stream and asks: "What would it look like if, instead of being sampled at 44.1kHz (twice the 20kHz audio range), it were sampled at (say) 12.5MHz?256 times higher? On this expanded time axis, a number of things happen. First, the basic quantization noise (generated by the ADC process) shifts to a much higher frequency?well outside the audio range?where it is easier to filter. Second, the changes in amplitude from one sample to the next are flattened. In effect, high resolution on the amplitude axis is replaced by high resolution on the time axis. But with the amplitude of the signal totally flattened, the only thing the DAC needs to do is determine the direction of the signal (up or down) from one sample to the next. The charge on a simple capacitor could then be used to accurately reflect these minute amplitude shifts.

Compared to an analog data converter, a sigma-delta converter is a complicated chip. It's not 32 transistors, but 20,000 logic gates. When fashioned in digital CMOS, however, it is cheaper to manufacture than an analog part, and much more accurate over time. Because of companies like Crystal Semiconductor, the part need not be limited to a 16-bit dynamic range, but can reflect an 18-, 20- or 24-bit dynamic range. This 120dB capability, almost beyond the range of human hearing, has set entirely new expectations for professional audio recording and new-generation consumer products.

It is this sort of talent?the ability to harness DSP to execute analog functions in digital CMOS?that will be harnessed in communications and multimedia applications. It will be utilized in asymmetrical digital subscriber lines (ADSL)?mixed-signal devices that use discrete multi-tone (DMT) signaling to put 1.5Mbps data streams on ordinary phone lines. It will be utilized to effect 10Mbps networking on ordinary phone lines in a home. It will also be utilized by HDDs to multiply the storage capacity of each platter by increasing the data transfer rates (up to 1Gbps this year) between read head and disk. These new ways to manipulate ones and zeros represent the future of mixed-signal design.

Article Comments - The future of mixed-signal design
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top