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Synchronous and asynchronous FIFO designs

Posted: 22 Jun 2000 ?? ?Print Version ?Bookmark and Share

Keywords:xilinx? ram? memory? fifo? xc4000?

This application note describes RAM-based FIFO designs using the dual-port RAM in XC4000-Series devices. Synchronous designs with a common read/write clock are described, as well as asynchronous designs with independent read and write clocks.

View the PDF document for more information.

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