International Rectifier's Total Dose Radiation Hardness Assurance (RHA) Test Program

1www.irf.com Application Notes DIE per WAFER (MAXIMUM) 4000 4 > 500 Application Notes www.irf.com2 Finish Wafer Lot including die probe and separation Chip Pack sample quantity from each wafer Assemble all devices for RHA testing Perform read and record Pre-RHA electricals Irradiate samples for pre-set dosage. VDS bias Irradiate samples for pre-set dosage. VGS bias Is RHA test complete? Post-process the read and record data to determine pass/fail for each wafer at each radiation increment Perform read and record post-irradiation electricals within 1 hour window Perform read and record post-irradiation electricals within 1 hour window International Rectifier Corporation RAD HARD ASSURANCE - Process Flow Yes NoNo Determine time needed for next irradiation increment Determine time needed for next irradiation increment The sample is divided, each half used for different bias conditions Figure 1 Samples are continued to higher levels of irradiation and subsequent testing according to the wafer fabri- cation process under consideration. For example, the SEE hardened process has a total dose capability of 100Krad (Si). IR will test all samples from SEE hard- ened wafers at 0, 50, and 100Krad (Si). The N chan- nel MEGA RAD HARD process samples are irradi- ated and tested at 0, 100, 300, 600 and 1000Krad (Si). Finally, the P channel MEGA RAD HARD process samples are irradiated at 0, 100 and 300Krad (Si). Given the test program consists of several parametric tests, an N channel wafer lot can easily result in more than 100,000 data points. As already noted this data is post-processed to determine the hardness of each 3www.irf.com Application Notes Figure 2 WaferLot ID Number 2N Number IRH Number etc. Test Number -- Parameter Conditions andLimits Wafer Number Bias; VGS and VDS Radiation Dose inRad(Si) PRE = 0KRad (Si) 100K = 100KRad (Si) etc. TestProgram Name and Rev.Number Application Notes www.irf.com4 wafer. All samples from a wafer must pass the para- metric limits for qualification at a specific hardness assurance level. For example, a wafer sample con- sisting of 8 devices may pass all tests at 0, 100 and 300Krad (Si), yet if one device fails the VGS(th) at 600Krad (Si) the wafer will only be qualified to 300Krad (Si). The parametric test limits and thus the acceptability of each wafer are controlled by the slash sheet or customer SCD, depending on the amount of parametric shifting allowed in the design. Summary Samples are built, tested and evaluated to qualify each wafer produced. The resultant data is stored, ana- lyzed and used to improve the process capability. This data is also provided to customers in the test report accompanying the deliverable units.