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CompactPCI answers next-generation needs

Posted: 01 Dec 2000 ?? ?Print Version ?Bookmark and Share

Keywords:compactpci? ip telephony? embedded systems? datacom? cpsb?

Designers of high-availability and next-generation Internet protocol (IP) telephony systems for competitive carriers face the ongoing challenge of building systems that are increasingly more dependable, smaller and cheaper to own and use. First-generation solutions still in the field are no longer sufficient. Second-generation architecture taking advantage of the CompactPCI form factor was a significant improvement, but remains impaired by limitations.

To handle these problems, a far more efficient solution is now emerging?Compact Packet Switching Backplane (cPSB). Tracing this design progression will put into context the technological value of this groundbreaking network architecture.

The first-generation approach brought together stand-alone servers, switches, routers and other devices from enterprise-system vendors?devices which, in general, are not specifically designed for telephone switching environment. With many systems, the only option for provisioning 48V involved mounting a 120Vac inverter in the rack. Components were bound with Cat. 5 Ethernet cables to exchange both control and customer traffic.

While off-the-shelf technology let equipment manufacturers get systems to market quickly, they were large, prone to failure and had high operational and maintenance costs. Often, multiple racks were needed to house hardware at one central office site. Monthly charges imposed by the local phone company or incumbent local exchange carrier were based on the square footage occupied in their facilities. Recurring costs added up quickly.

Further, if a box-level component failed, the entire unit had to be replaced. This entailed removing the cables, pulling the unit, installing a new box, recabling it and, hardest of all, reprogramming it to match the configuration prior to failure. Geographically dispersed telco sites meant even more support problems.

Addressing these problems, many telecom system designers began integrating systems around CompactPCI. This robust and concise form factor, based on rugged chassis and cards, complies with the telecom industry's stringent Network Equipment Building standards applying to vibration, shock and ESD. Replacing the stand-alone box-level systems with integrated CompactPCI systems eliminated much of the metal work, multiple power supplies and fans that consume large amounts of power and space. With fewer failure-prone components, these newer systems were approximately one-fifth the size and far more reliable than their predecessors.

Most CompactPCI subsystems also support CompactPCI's hot-swap capability. This lets users upgrade, enlarge or repair the system on the fly without having to power cycle a chassis and without affecting other subsystems within it--making them far easier to maintain and repair than first-generation gear. But CompactPCI has its shortcomings.

First, it uses a shared bus architecture limited in throughput to a theoretical limit of 533MBps over the eight slots that the 66MHz version of CompactPCI supports. While bridges can increase the number of slots that can be supported, available system bandwidth does not increase significantly.

In addition, chassis units must have drivers that are compatible with the OS installed in the slot-one controller. Finally, standard CompactPCI subsystems are designed with only one CompactPCI bus interface. If a CompactPCI interface controller on one subsystem seizes the bus, the entire system is inoperable. Redundant CompactPCI buses on the same midplane provide a level of resilience at a higher cost, but still face the chassis width and speed limits imposed by CompactPCI. This is where cPSB comes in. To deal with these and other problems, the radically new CompactPCI packet-switching backplane architecture has been proposed to the PCI Industrial Computer Manufacturers Group.

It does not replace CompactPCI. In essence, cPSB overlays an embedded Ethernet switching network fabric on the CompactPCI backplane. By extending CompactPCI's capabilities, it allows developers of next-generation packet-based systems to reduce design complexity and component costs while increasing overall system reliability and performance.

The cPSB architecture is based on two concepts: First, an Ethernet infrastructure is embedded in the CompactPCI midplane and is accessed via the J3 connector, with an Ethernet switching element residing in one or more of the CompactPCI slots, interconnecting all the slots in the chassis. Second, all subsystems operate as stand-alone systems on a card, interfacing through a network stack on top of Ethernet.

The proposed change dramatically improves the performance, scalability and reliability of CompactPCI while preserving its mechanical, power and hot-swap attributes. It also leaves the H.110 telephony bus intact for systems that support that standard. Components that support cPSB can be mixed with units that still rely on the CompactPCI bus for communication within the same chassis. Developers will be able to organically grow system capabilities onto the cPSB framework over time, since there is no need to change subsystems built around legacy CompactPCI elements. Systems can evolve over time in response to changing needs, without scrapping prior design work.

The cPSB significantly increases the performance of subsystems in a CompactPCI chassis by moving data traffic off the shared CompactPCI bus and onto an embedded, switched 10/100/1,000Mbps Ethernet network. To improve reliability, two fully independent packet buses are defined, providing theoretical backplane throughput rates up to 5GBps?an improvement of an order of magnitude over current CompactPCI implementations.

In the cPSB definition, up to 20 link slots can be supported using a single fabric (packet-switching) slot in a 19-inch CompactPCI chassis. Redundant hot-swappable fabric slots can support up to 19 link slots. By using only one pin per slot per fabric, packet-switched backplane performance can range from 250MBps (with a single 100Mbps fabric) up to 5GBps (with dual-switched gigabyte fabrics). System expansion is accommodated by running Cat. 5 Ethernet cables to external connections to extend the packet-switched bus. This technique can be used to expand the system to one or more CompactPCI or even non-CompactPCI systems, creating a "virtual backplane."

The cPSB definition promotes the systems-on-a-card concept, where each card in a chassis operates as a discrete system or subsystem with its own processor, memory and operating system. The cPSB enables creation of integrated systems in which any card can reside in any link slot and run any OS, provided that each card supports standard Ethernet protocol communications interfaces. Because integration occurs at the system level, rather than at the driver level, time-to-market is dramatically improved.

As requirements change, individual cards or subsystems or both can be changed without affecting other constituents in the system. This lets designers pick the best-of-class CompactPCI solution for their design without regard to OS support. Integrators can choose the best solution for any given application. Ethernet connects all units in the chassis so system-integration tasks are greatly simplified. As features are added to the Ethernet standard, systems based on cPSB can capitalize on the improvements.

? Hank Heneghan

Senior Product Manager

Performance Technologies Inc.

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